Patents by Inventor Rachid E. Rayess

Rachid E. Rayess has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250211109
    Abstract: Embodiments herein relate to a voltage regulator (VR) which includes a main current source (MCS), a parallel current source (PCS) which is activated when a voltage droop is detected, and a finite state machine (FSM) to manage a recovery from the voltage droop. The FSM can have a Droop state in which a droop is detected in the output voltage of the VR and the PCS provides an output current to an output node of the VR, a PCS ramp down state in which the output current of the PCS ramps down while the MCS has a boosted set point, and a voltage identifier (VID) boost ramp down state in which the set point of the MCS ramps down from the boosted set point.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 26, 2025
    Inventors: Kelly Livingston, Christopher Schaef, Alexander Lyakhov, Dmitry Lukiyanchenko, Maximilian Geppert, Rachid E. Rayess
  • Patent number: 11442529
    Abstract: In one embodiment, an apparatus comprises: a plurality of intellectual property (IP) circuits, each of the plurality of IP circuits including a configuration register to store a dynamic current budget; and a power controller coupled to the plurality of IP circuits, the power controller including a dynamic current sharing control circuit to receive current throttling hint information regarding a workload to be executed on at least some of the plurality of IP circuits and generate the dynamic current budget for each of the plurality of IP circuits based at least in part thereon. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Avinash N. Ananthakrishnan, Ameya Ambardekar, Ankush Varma, Nimrod Angel, Nir Rosenzweig, Arik Gihon, Alexander Gendler, Rachid E. Rayess, Tamir Salus
  • Publication number: 20200363860
    Abstract: In one embodiment, an apparatus comprises: a plurality of intellectual property (IP) circuits, each of the plurality of IP circuits including a configuration register to store a dynamic current budget; and a power controller coupled to the plurality of IP circuits, the power controller including a dynamic current sharing control circuit to receive current throttling hint information regarding a workload to be executed on at least some of the plurality of IP circuits and generate the dynamic current budget for each of the plurality of IP circuits based at least in part thereon. Other embodiments are described and claimed.
    Type: Application
    Filed: May 15, 2019
    Publication date: November 19, 2020
    Inventors: Avinash N. Ananthakrishnan, Ameya Ambardekar, Ankush Varma, Nimrod Angel, Nir Rosenzweig, Arik Gihon, Alexander Gendler, Rachid E. Rayess, Tamir Salus
  • Patent number: 10122265
    Abstract: An apparatus is provided which comprises: at least two switches in series between an input voltage node and a ground terminal; an inductor coupled between a mid-point of the at least two switches and an output terminal; a first circuitry to compare a current through the inductor with a threshold current, and to control one or both of the at least two switches, based at least in part on the comparison; and a second circuitry to randomly vary the threshold current over consecutive cycles of switching of the at least two switches.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventors: George E. Matthew, Gerhard Schrom, Alexander Lyakhov, Rachid E. Rayess, Anant S. Deval, Sergio Carlo Rodriguez, Pushkar Dixit