Patents by Inventor Radhakrishna As

Radhakrishna As has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990370
    Abstract: Methods of manufacturing semiconductor devices, and associated systems and devices, are disclosed herein. In some embodiments, a method of manufacturing a semiconductor device includes forming an opening in an electrically insulative material at least partially over a first electrically conductive feature and a second electrically conductive feature. The method can further include forming a ring of electrically conductive material around a sidewall of the insulative material defining the opening, wherein the ring of electrically conductive material includes (a) a first via portion over the first electrically conductive feature, (b) a second via portion over the second electrically conductive feature, and (c) connecting portions extending between the first and second via portions. Finally, the method can include removing the connecting portions of the ring of electrically conductive material to electrically isolate the first via portion from the second via portion.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: May 21, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Trupti D. Gawai, David S. Pratt, Ahmed M. Elsied, David A. Kewley, Dale W. Collins, Raju Ahmed, Chelsea M. Jordan, Radhakrishna Kotti
  • Patent number: 11977606
    Abstract: A computer implemented method includes obtaining multiple configuration files that include configuration commit histories, detecting patterns in parameter values in the configuration files to generate file-based rules for configuration parameters, detecting patterns in parameter values in the configuration files to generate history-based rules using commit histories for the configuration parameters, and exposing the rules to calling programs.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: May 7, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ranjita Bhagwan, Sonu Mehta, Arjun Radhakrishna, Sahil Garg
  • Publication number: 20240126184
    Abstract: A bearing system (200) for supporting a first component (202) on a second component (204) of a lithography system (100A, 100B) has an adhesive (212, 212?) which secures the first and second component (202, 204) against each other. The first component (202) has at least two surfaces (216) inclined towards each other and a first adhesive surface (218) which connects the two surfaces (216), and the second component (204) has at least one ball section (220) which is received between the at least two mutually inclined surfaces (216). The ball section includes a ball surface section (226) and a second adhesive surface (230), which is arranged between two sub-sections (232, 234) of the ball surface section (226) when viewed in cross-section, and the adhesive (212, 212?) is arranged between the first and the second adhesive surface (218, 230).
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Inventors: Radhakrishna RAO, Robin GLORIAN
  • Patent number: 11961556
    Abstract: Methods, systems, and devices supporting a socket design for a memory device are described. A die may include one or more memory arrays, which each may include any number of word lines and any number of bit lines. The word lines and the bit lines may be oriented in different directions, and memory cells may be located at the intersections of word lines and bit lines. Sockets may couple the word lines and bit lines to associated drivers, and the sockets may be located such that memory cells farther from a corresponding word line socket are nearer a corresponding bit line socket, and vice versa. For example, sockets may be disposed in rows or regions that are parallel to one another, and which may be non-orthogonal to the corresponding word lines and bit lines.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Radhakrishna Kotti, Rajasekhar Venigalla
  • Publication number: 20240104892
    Abstract: Methods, system, and media for comparing a set of images to determine the existence and location of any differences between the image set. The differences may be located using image comparison techniques such as SURF and Blob Detection, as well as through techniques used to identify areas of data sliding and match probabilities. A logical match probability, as well as a physical match probability, may be included in an output report with a result image highlighting the differences between the comparison images in the image set.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 28, 2024
    Inventor: Renjith Radhakrishna Pillai Suseelamma
  • Patent number: 11941372
    Abstract: Edit automation functionality generalizes edits performed by a user in a document, locates similar text, and recommends or applies transforms while staying within a current workflow. Source code edits such as refactoring are automated. The functionality uses or provides anchor target lists, temporal edit patterns, edit graphs, automatable edit sequence libraries, and other data structures and computational techniques for identifying locations appropriate for particular edits, for getting transforms, for selecting optimal transforms, for leveraging transforms in an editing session or later, and for displaying transform recommendations and results. The edit automation functionality enhances automation subtool generation, discoverability, and flexibility, for refactoring, snippet insertion, quick actions in an integrated development environment, and other automatable edit sequences.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: March 26, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Titus Barik, Gustavo Araujo Soares, Piyush Arora, Peter Groenewegen, Sumit Gulwani, Ameya Sanjay Ketkar, Vu Minh Le, Wode Ni, David Ellis Pugh, Arjun Radhakrishna, Ivan Radicek, Ashish Tiwari, Mark Alistair Wilson-Thomas
  • Patent number: 11934801
    Abstract: Embodiments use a multi-modal approach to generate software programs that match a solution program description. The solution program description may include natural language, input-output examples, partial source code, desired operators, or other hints. Some embodiments use optimized prompts to a pre-trained language model to obtain initial candidate programs. Maximal program components are extracted and then recombined variously using component-based synthesis. Beam search reduces a solution program search space by discarding some candidates from a given synthesis iteration. Relevance metrics, string similarity metrics, operator frequency distributions, token rareness scores, and other optimizations may be employed. By virtue of optimizations and the multi-modal approach, a solution program may be obtained after fewer iterations than by use of a language model alone.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: March 19, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Kiarash Rahmani, Mohammad Raza, Sumit Gulwani, Vu Minh Le, Daniel James Morris, Arjun Radhakrishna, Gustavo Araujo Soares, Ashish Tiwari
  • Publication number: 20240086169
    Abstract: A video security system configured for simplified cluster join is disclosed. The video security system includes a video management server device that internally includes at least one non-volatile storage medium initially storing incomplete portions of first and second computer readable instructions that entirely define server components that provide first and second operational supports for first and second video cameras. The video management server device is configured to communicate with the first and second video cameras over at least one local area network path. The video management server device is also configured to communicate with a package sourcing entity to transmit information about the incomplete portions to the package sourcing entity.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: PAUL D CHARLES, SHAUN MARLATT, THANH HO, ARUN KUMAR RADHAKRISHNA PILLAI, MICHAEL JAMESON
  • Publication number: 20240088647
    Abstract: In one example, an apparatus comprises: a first switch and a second switch coupled between a fuse terminal and a ground terminal, the first switch having a first switch control terminal, the second switch having a second switch control terminal; and a driver circuit having a control input, a first control output, and a second control output, the control input coupled to the fuse terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Yogesh Kumar Ramadass, Ujwal Radhakrishna, Jeffrey Morroni
  • Patent number: 11921649
    Abstract: Various implementations described herein relate to systems and methods for a solid state drive (SSD) that includes a first controller and a NAND package. The NAND package includes a plurality of dies grouped into a plurality of subsets. The NAND package includes a second controller operatively coupled to each of the plurality of subsets via a corresponding one of a plurality of parallel mode channels. The first controller is operatively coupled to the NAND package via a serial link.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: March 5, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: Tiruvur Radhakrishna Ramesh, Avadhani Shridhar, Senthilkumar Diraviam, Gary Lin
  • Patent number: 11916721
    Abstract: Examples herein describe systems and methods for self-healing in a Telco network function virtualization cloud. KPI attributes for virtual network functions can be mapped to physical fault notifications to create synthesized alerts. The synthesized alerts can include information from both a virtual and physical layer, allowing a self-healing action framework to determine root causes of problems in the Telco cloud. Remedial actions can then be performed in either the virtual or physical layer of the Telco cloud. Remedial actions in one layer can be based on root causes identified in the other, which can allow for remediation before network downtime occurs.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: February 27, 2024
    Assignee: VMware, Inc.
    Inventors: Radhakrishna Embarmannar Vijayan, Thatayya Naidu Venkata Polamarasetty
  • Publication number: 20240063210
    Abstract: Integrated circuit structures having backside power delivery for multi-height standard cell circuits are described. In an example, an integrated circuit structure includes a front-side structure including a device layer including a first cell separated from a second cell by a cell boundary, and a metallization layer immediately above the device layer. A track of the metallization layer is along the cell boundary from a plan view perspective. A backside structure is below the device layer. The backside structure provides power to the device layer.
    Type: Application
    Filed: August 17, 2022
    Publication date: February 22, 2024
    Inventors: Nischal ARKALI RADHAKRISHNA, Sukru YEMENICIOGLU, Somashekar BANGALORE PRAKASH, Richard E. SCHENKER
  • Patent number: 11905241
    Abstract: Methods and systems for treating an olefin-containing stream are disclosed. The disclosed methods and systems are particularly suitable for treating an off-gas stream in a refining or petrochemical process, such as from a fluid catalytic cracker (FCC), coker, steam cracker, and the like. The stream is treated in an absorber column to reject lighter stream components and to absorb ethylene and/or propylene into a solvent. The solvent is typically isobutane. The enriched solvent stream from the absorber column is fed to an alkylation reactor, which reacts the dissolved olefin with the isobutane solvent to produce an alkylate product.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: February 20, 2024
    Assignee: KELLOGG BROWN & ROOT LLC
    Inventors: Gautham Krishnaiah, Brian Heasley, John Lewis Webb, Jr., Rahul Radhakrishna Pillai, Vijender K. Verma, Narinder Singh Duggal
  • Publication number: 20240047387
    Abstract: A microelectronic device includes a doped region of semiconductor material having a first region and an opposite second region. The microelectronic device is configured to provide a first operational potential at the first region and to provide a second operational potential at the second region. The microelectronic device includes field plate segments in trenches extending into the doped region. Each field plate segment is separated from the semiconductor material by a trench liner of dielectric material. The microelectronic device further includes circuitry electrically connected to each of the field plate segments. The circuitry is configured to apply bias potentials to the field plate segments. The bias potentials are monotonic with respect to distances of the field plate segments from the first region of the doped region.
    Type: Application
    Filed: October 20, 2023
    Publication date: February 8, 2024
    Inventors: Alexei Sadovnikov, Sheldon Douglas Haynie, Ujwal Radhakrishna
  • Publication number: 20240039703
    Abstract: Modules for hub network elements and methods are described, including a method comprising (a) generating a partial key indicative of a unique public key associated with a hub network element in a transport network, (b) sending a partial-key message comprising the partial key and an ordered sequence to a particular network element of the ordered sequence, (c) receiving, from the particular network element to which the partial-key message was sent, the partial-key message having been modified by a unique private key associated with the particular network element, (d) repeating steps (b) and (c) for each successive network element in the ordered sequence except for a source network element and a destination network element designated by the ordered sequence, and (e) sending the partial-key message to the destination network element. The transport network comprises a plurality of network elements including the hub network element and a plurality of leaf network elements.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 1, 2024
    Inventors: Radhakrishna Valiveti, Steven Joseph Hand, Rajan Rao
  • Publication number: 20240029031
    Abstract: Automated management of tasks in a preventive maintenance context supports associating preventive maintenance targets with a preventive maintenance task. A trained machine learning model can predict which targets are most likely to be appropriate for a given header preventive maintenance target. A user interface can assist in target selection. Data integrity can be improved, and unnecessary expenditure of preventive maintenance resources can be avoided. A trained machine learning model can support features such as filtering and identifying outliers.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 25, 2024
    Applicant: SAP SE
    Inventors: Niranjan Raju, Sagarika Mitra, Meby Mathew, Radhakrishna Aekbote, Shirish Totade
  • Patent number: 11880683
    Abstract: Systems, apparatuses, and methods for efficiently processing arithmetic operations are disclosed. A computing system includes a processor capable of executing single precision mathematical instructions on data sizes of M bits and half precision mathematical instructions on data sizes of N bits, which is less than M bits. At least two source operands with M bits indicated by a received instruction are read from a register file. If the instruction is a packed math instruction, at least a first source operand with a size of N bits less than M bits is selected from either a high portion or a low portion of one of the at least two source operands read from the register file. The instruction includes fields storing bits, each bit indicating the high portion or the low portion of a given source operand associated with a register identifier specified elsewhere in the instruction.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: January 23, 2024
    Assignee: Advanced micro devices, inc.
    Inventors: Jiasheng Chen, Bin He, Yunxiao Zou, Michael J. Mantor, Radhakrishna Giduthuri, Eric J. Finger, Brian D. Emberling
  • Patent number: 11875136
    Abstract: Edit automation functionality generalizes edits performed by a user in a document, locates similar text, and recommends or applies transforms while staying within a current workflow. Source code edits such as refactoring are automated. The functionality uses or provides anchor target lists, temporal edit patterns, edit graphs, automatable edit sequence libraries, and other data structures and computational techniques for identifying locations appropriate for particular edits, for getting transforms, for selecting optimal transforms, for leveraging transforms in an editing session or later, and for displaying transform recommendations and results. The edit automation functionality enhances automation subtool generation, discoverability, and flexibility, for refactoring, snippet insertion, quick actions in an integrated development environment, and other automatable edit sequences.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: January 16, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gustavo Araujo Soares, Piyush Arora, Titus Barik, Peter Groenewegen, Sumit Gulwani, Ameya Sanjay Ketkar, Vu Minh Le, Wode Ni, David Ellis Pugh, Arjun Radhakrishna, Ivan Radicek, Ashish Tiwari, Mark Alistair Wilson-Thomas
  • Patent number: 11859578
    Abstract: A first cascade segment of a thrust reverser system has a first cascade segment flow area and is associated with a first lateral sector. A second cascade segment has a second cascade segment flow area and is associated with a second lateral sector. The second cascade segment flow area may be at least 1.2 times the first cascade segment flow area. The first lateral sector has a first leakage flow area and a first total flow area that is equal to a sum of at least the first cascade segment flow area and the first leakage flow area. The second lateral sector has a second leakage flow area and a second total flow area that is equal to a sum of at least the second cascade segment flow area and the second leakage flow area. The second total flow area may be within 10% of the first total flow area.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: January 2, 2024
    Assignee: Rohr, Inc.
    Inventors: Radhakrishna Chilukuri, Ashok Babu Saya, Hussain Mahamed Javed Tapadar
  • Publication number: 20230420512
    Abstract: Integrated circuit structures having backside power staple are described. In an example, an integrated circuit structure includes a plurality of gate lines. A plurality of trench contacts is extending over a plurality of source or drain structures, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A front-side metal routing layer is extending over one or more of the plurality of gate lines, and over and coupled to one or more of the plurality of trench contacts. A backside metal routing layer is extending beneath the one or more of the plurality of gate lines and the one or more of the plurality of trench contacts, the backside metal routing layer parallel and overlapping with the front-side metal routing layer. A conductive feedthrough structure couples the backside metal routing layer to the front-side metal routing layer.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Sukru YEMENICIOGLU, Xinning WANG, Nischal ARKALI RADHAKRISHNA, Leonard P. GULER, Mauro J. KOBRINSKY, June CHOI, Pratik PATEL, Tahir GHANI