Abstract: Embodiments are directed to a driver circuit for an electro-absorption modulator (EAM). Particular embodiments may employ a single differential electrical driver supplying complementary positive and negative voltage signals to two respective EAMs. DC bias for the EAMs is provided at a common node in the middle. An optical source is split and fed to each of the EAMs. The EAM receiving the positive voltage signal functions to communicate the optical data as output. The other EAM receiving the negative voltage is a dummy device providing a balance load for the differential driver circuit. Signal swing is determined by a termination resistor Rt located between parallel rails of the differential driver circuit. EAM properties such as swing and signal integrity can be traded off by choosing a different value for the termination resistor. In certain embodiments, the optical output of the dummy EAM may be used for device monitoring purposes.

Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

Abstract: An apparatus for converting fiber mode to waveguide mode. The apparatus includes a silicon substrate member and a dielectric member having an elongated body. Part of the elongated body from a back end overlies the silicon substrate member and remaining part of the elongated body up to a front end is separated from the silicon substrate member by a second dielectric material at an under region. The apparatus also includes a waveguide including a segment from the back end to a tail end formed on the dielectric member at least partially overlying the remaining part of the elongated body. The segment is buried in a cladding overlying entirely the dielectric member. The cladding has a refractive index that is less than the waveguide but includes an index-graded section with decreasing index that is formed at least over the segment from the tail end toward the back end.

Abstract: A silicon photonics based temperature-insensitive delay line interferometer (DLI). The DLI includes a first arm comprising a first length of a first material characterized by a first group index corresponding to a first phase delay to transfer a first light wave with a first peak frequency and a second arm comprising a second length of a second material characterized by a second group index corresponding to a second phase to transfer a second light wave with a second peak frequency with a time-delay difference relative to the first light wave. The first phase delay and the second phase delay are configured to change equally upon a change of temperature. The time-delay difference between the first light wave and the second light wave is set to be inversed value of a free spectral range (FSR) to align at least the first peak frequency to a channel of a designated frequency grid.

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a variable bias block configured with the control block, the variable bias block being configured to selectively tune each of a plurality of laser devices provided on the silicon photonics device to adjust for at least a wavelength of operation, a fabrication tolerance, and an extinction ratio.

Abstract: A PAM4 driver with at least 56 Gbps speed for driving a Mach-Zehnder modulator. The PAM4 driver is configured as 2-bit CMOS digital-to-analog convertor including a drive control module for receiving a pair of incoming differential digital data and generating a first processed reference signal and a second processed reference signal. The PAM4 driver further includes a mirrored buffer circuit to produce two sets of four voltage levels. Furthermore, the PAM4 driver includes a decoder module controlled by a switch bias control module configured to decode each of the two sets of four voltage levels for generating a first output signal and a complementary second out signal with 4 independently adjustable analog levels for driving the Mach-Zehnder modulator with close ended termination resistor.

Abstract: An integrated apparatus with optical/electrical interfaces and protocol converter on a single silicon substrate. The apparatus includes an optical module comprising one or more modulators respectively coupled with one or more laser devices for producing a first optical signal to an optical interface and one or more photodetectors for detecting a second optical signal from the optical interface to generate a current signal. Additionally, the apparatus includes a transmit lane module coupled between the optical module and an electrical interface to receive a first electric signal from the electrical interface and provide a framing protocol for driving the one or more modulators. Furthermore, the apparatus includes a receive lane module coupled between the optical module and the electrical interface to process the current signal to send a second electric signal to the electrical interface.

Abstract: An apparatus of polarization self-compensated delay line interferometer. The apparatus includes a first waveguide arm of a first material of a first length disposed between an input coupler and an output coupler and a second waveguide arm of the first material of a second length different from the first length disposed between the same input coupler and the same output coupler. The apparatus produces an interference spectrum with multiple periodic passband peaks where certain TE (transverse electric) and TM (transverse magnetic) polarization mode passband peaks are lined up. The apparatus further includes a section of waveguide of a birefringence material of a third length added to the second waveguide arm to induce a phase shift of the lined-up TE/TM passband peaks to a designated grid as corresponding polarization compensated channels of a wide optical band.

Abstract: A Pulse Amplitude Modulated (PAM) optical device utilizing multiple wavelengths, features a communications interface having enhanced diagnostics capability. New registers are created to house additional diagnostic information, such as error rates. The diagnostic information may be stored in raw form, or as processed on-chip utilizing local resources.

Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

Abstract: A compact optical transceiver formed by hybrid multichip integration. The optical transceiver includes a Si-photonics chip attached on a PCB. Additionally, the optical transceiver includes a first TSV interposer and a second TSV interposer separately attached nearby the Si-photonics chip on the PCB. Furthermore, the optical transceiver includes a driver chip flip-bonded partially on the Si-photonics chip through a first sets of bumps and partially on the first TSV interposer through a second sets of bumps. Moreover, the optical transceiver includes a transimpedance amplifier module chip flip-bonded partially on the Si-photonics chip through a third sets of bumps and partially on the second TSV interposer through a fourth set of bumps.

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. In an example, the data input/output interface is configured for number of lanes numbered from four to one hundred and fifty. In an example, the SerDes block is configured to convert a first data stream of N into a second data stream of M such that each of the first data stream having a first predefined data rate at a first clock rate and each of the second data stream having a second predefined data rate at a second clock rate.

Abstract: A photonic transceiver apparatus in Quad Small Form-factor Pluggable (QSFP) package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a printed circuit board (PCB), installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module.

Abstract: An optical transceiver by hybrid multichip integration. The optical transceiver includes a PCB with a plurality of prefabricated surface bonding sites. A first chip includes a FOWLP package of multiple electronics devices embedded in a dielectric molding layer overlying a dielectric redistribution layer is disposed on the PCB by respectively bonding a plurality of conductor balls between the dielectric redistribution layer and the plurality of prefabricated surface bonding sites while exposing soldering material filled in multiple through-mold vias (TMVs) in the dielectric molding layer. The optical transceiver further includes a second chip configured as a Sipho die comprising photonics devices embedded in a SOI wafer substantially free from any electronics device process. The second chip is stacked over the first chip with multiple conductor bumps being bonded respectively to the soldering material in the multiple TMVs.

Abstract: An silicon photonics device of hybrid waveguides having a coupling interlayer with an accurately controlled thickness and a method of making the same. The device includes a first plurality of Si waveguides formed in a SOI substrate and a first layer of SiO2 overlying the first plurality of Si waveguides and a second plurality of Si3N4 waveguides formed on the first layer of SiO2. At least one Si3N4 waveguide is disposed partially overlapping with at least one of the first plurality Si waveguides in vertical direction separated by the first layer of SiO2 with a thickness controlled no greater than 90 nm. The device includes a second layer of SiO2 overlying the second plurality of Si3N4 waveguides. The method of accurately controlling the coupling interlayer SiO2 thickness includes a multilayer SiO2/Si3N4/SiO2 hard mask process for SiO2 etching and polishing as stopping and buffering layer as well as Si waveguide etching mask.

Abstract: A PAM4 driver with at least 56 Gbps speed for driving a Mach-Zehnder modulator. The PAM4 driver is configured as 2-bit CMOS digital-to-analog convertor including a drive control module for receiving a pair of incoming differential digital data and generating a first processed reference signal and a second processed reference signal. The PAM4 driver further includes a mirrored buffer circuit to produce two sets of four voltage levels. Furthermore, the PAM4 driver includes a decoder module controlled by a switch bias control module configured to decode each of the two sets of four voltage levels for generating a first output signal and a complementary second out signal with 4 independently adjustable analog levels for driving the Mach-Zehnder modulator with close ended termination resistor.

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a variable bias block configured with the control block, the variable bias block being configured to selectively tune each of a plurality of laser devices provided on the silicon photonics device to adjust for at least a wavelength of operation, a fabrication tolerance, and an extinction ratio.

Abstract: A single chip dual-channel driver for two independent traveling wave modulators. The driver includes two differential pairs inputs per channel respectively configured to receive two digital differential pair signals. The driver further includes a two-bit DAC per channel coupled to the two differential pairs inputs to produce a single analog differential pair PAM signal at a differential pair output for driving a traveling wave modulator. Additionally, the driver includes a control block having internal voltage/current signal generators respective coupled to each input and the 2-bit DAC for providing a bias voltage, a tail current, a dither signal to assist modulation control per channel. Furthermore, the driver includes an internal I2C communication block coupled to a high-speed clock generator to generate control signals to the control block and coupled to host via an I2C digital communication interface.

Abstract: A silicon photonics device of hybrid waveguides having a coupling interlayer with an accurately controlled thickness and a method of making the same. The device includes a first plurality of Si waveguides formed in a SOI substrate and a first layer of SiO2 overlying the first plurality of Si waveguides and a second plurality of Si3N4 waveguides formed on the first layer of SiO2. At least one Si3N4 waveguide is disposed partially overlapping with at least one of the first plurality Si waveguides in vertical direction separated by the first layer of SiO2 with a thickness controlled no greater than 90 nm. The device includes a second layer of SiO2 overlying the second plurality of Si3N4 waveguides. The method of accurately controlling the coupling interlayer SiO2 thickness includes a multilayer SiO2/Si3N4/SiO2 hard mask process for SiO2 etching and polishing as stopping and buffering layer as well as Si waveguide etching mask.

Abstract: An apparatus for packaging a photonic transceiver. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a PCB installed inside the spatial volume over the base member with a pluggable connector at the back end. The apparatus includes one or more optical transmitting devices being mounted upside-down via a flex circuit board bended 180 degrees inward to a backside of the PCB and including a built-in TEC module in contact with the lid member. Furthermore, the apparatus includes a silicon photonics chip including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance-amplifier module. Moreover, the apparatus includes an optical input port and output port being back connected to the fiber-to-silicon attachment module.