Patents by Inventor Radhakrishnan V. Mahalikudi

Radhakrishnan V. Mahalikudi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090171647
    Abstract: A method and apparatus for ensuring efficient validation coverage of an architecture, such as protocol or interconnect architecture, is herein described. A coverage space of states for an architecture is generated and stored in a database. During simulation, states of the coverage space encountered are marked. From this, the states encountered and not encountered may be determined. Based on the states not encountered, a targeted test suite is developed to target at least some of the states not encountered during previous simulation. This feedback loop from simulation to refining of a test suite based on states of a coverage space not encountered during simulation may be recursively repeated until adequate validation, i.e. an adequate confidence level of validation, of the coverage space is achieved.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventors: Phanindra Mannava, Seungjoon Park, Ajit Dingankar, Ching-Tsun Chou, Nikhil Mittal, Radhakrishnan V. Mahalikudi, Mayank Singhal