Patents by Inventor Radu Eugen Cazimirovici

Radu Eugen Cazimirovici has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10199490
    Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: February 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Adrian Finney, Radu Eugen Cazimirovici, Dietmar Kotz, Thomas Ostermann
  • Publication number: 20180197982
    Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Adrian Finney, Radu Eugen Cazimirovici, Dietmar Kotz, Thomas Ostermann
  • Patent number: 9941402
    Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: April 10, 2018
    Assignee: Infineon Technologies AG
    Inventors: Adrian Finney, Dietmar Kotz, Radu Eugen Cazimirovici, Thomas Ostermann
  • Publication number: 20170373182
    Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.
    Type: Application
    Filed: June 20, 2017
    Publication date: December 28, 2017
    Inventors: Adrian Finney, Dietmar Kotz, Radu Eugen Cazimirovici, Thomas Ostermann