Patents by Inventor Rae young LEE

Rae young LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11956998
    Abstract: A display device includes: a first substrate including a pixel area and a transmissive area; a thin-film transistor on the first substrate; a planarization layer on the thin-film transistor; a first light emitting electrode on the planarization layer; a bank covering a part of the first light emitting electrode; a light emitting layer on the first light emitting electrode; and a second light emitting electrode on the light emitting layer and the bank. The transmissive area includes a transmissive hole penetrating the bank and the planarization layer.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: April 9, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Se Wan Son, Moo Soon Ko, Rae Young Gwak, Jin Seock Ma, Min Jeong Park, Ki Bok Yoo, So La Lee, Jin Goo Jung, Jong Won Chae, Ye Ji Han
  • Patent number: 11881268
    Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: January 23, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Ji Lee, Jin-Kyu Kang, Rae Young Lee, Se Jun Park, Jae Duk Lee, Gu Yeon Han
  • Publication number: 20230022639
    Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.
    Type: Application
    Filed: April 4, 2022
    Publication date: January 26, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye Ji LEE, Jin-Kyu KANG, Rae Young LEE, Se Jun PARK, Jae Duk LEE, Gu Yeon HAN
  • Patent number: 11538533
    Abstract: A non-volatile memory device including: a memory cell array including non-volatile memory blocks connected to a plurality of word lines, a plurality of bit lines and a common source line; a common source line driver configured to supply a common source line voltage to the common source line; a page buffer unit configured to supply a bit line voltage to at least one of the plurality of bit lines; a control logic circuit configured to adjust the common source line voltage and the bit line voltage; and a channel initialization circuit, wherein the channel initialization circuit sets the common source line voltage and the bit line voltage to an initialization pulse, and the channel initialization circuit applies the initialization pulse between a plurality of read sections in which a read voltage is applied to at least two of the plurality of word lines.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: December 27, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gu Yeon Han, Jin-Kyu Kang, Rae Young Lee, Se Jun Park, Jae Duk Lee
  • Publication number: 20220076727
    Abstract: A non-volatile memory device including: a memory cell array including non-volatile memory blocks connected to a plurality of word lines, a plurality of bit lines and a common source line; a common source line driver configured to supply a common source line voltage to the common source line; a page buffer unit configured to supply a bit line voltage to at least one of the plurality of bit lines; a control logic circuit configured to adjust the common source line voltage and the bit line voltage; and a channel initialization circuit, wherein the channel initialization circuit sets the common source line voltage and the bit line voltage to an initialization pulse, and the channel initialization circuit applies the initialization pulse between a plurality of read sections in which a read voltage is applied to at least two of the plurality of word lines.
    Type: Application
    Filed: April 19, 2021
    Publication date: March 10, 2022
    Inventors: Gu Yeon HAN, Jin-Kyu KANG, Rae Young LEE, Se Jun PARK, Jae Duk LEE
  • Patent number: 9359816
    Abstract: The present invention relates to a roller shutter in which a slat connection structure is very flexible so as to reduce manufacturing and maintenance costs. The roller shutter of the present invention comprises: a plurality of slats continuously connected in the vertical direction; a winding unit for winding or unwinding the plurality of slats in the vertical direction; a shutter box arranged above a door frame of a building; and a guide frame for guiding the edges of the plurality of slats. The winding unit is arranged inside the shutter box. The plurality of slats are connected in the vertical direction such that the slats can be pivoted. One end of each slat has a hook, and the hook is curved with a predetermined radius of curvature. The other end of each slat has an accommodation groove curved at a predetermined radius of curvature.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: June 7, 2016
    Inventor: Rae young Lee
  • Publication number: 20150144276
    Abstract: The present invention relates to a roller shutter in which a slat connection structure is very flexible so as to reduce manufacturing and maintenance costs. The roller shutter of the present invention comprises: a plurality of slats continuously connected in the vertical direction; a winding unit for winding or unwinding the plurality of slats in the vertical direction; a shutter box arranged above a door frame of a building; and a guide frame for guiding the edges of the plurality of slats. The winding unit is arranged inside the shutter box. The plurality of slats are connected in the vertical direction such that the slats can be pivoted. One end of each slat has a hook, and the hook is curved with a predetermined radius of curvature. The other end of each slat has an accommodation groove curved at a predetermined radius of curvature.
    Type: Application
    Filed: May 28, 2013
    Publication date: May 28, 2015
    Inventor: Rae young LEE