Patents by Inventor Raffaele Cetrulo

Raffaele Cetrulo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11589767
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 28, 2023
    Assignees: Board of Regents, The University of Texas System, Admittance Technologies, Inc.
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Publication number: 20190357805
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Application
    Filed: August 8, 2019
    Publication date: November 28, 2019
    Applicants: Board of Regents, The University of Texas System, Admittance Technologies, Inc.
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Patent number: 10376177
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: August 13, 2019
    Assignees: Admittance Technologies, Inc., Board of Regents, The University of Texas System
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Publication number: 20160262653
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Application
    Filed: February 16, 2016
    Publication date: September 15, 2016
    Applicants: Board of Regents, The University of Texas System, Admittance Technologies, Inc.
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Patent number: 9295404
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: March 29, 2016
    Assignees: Admittance Technologies, Inc., Board of Regents, The University of Texas System
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Publication number: 20130023946
    Abstract: An apparatus for measuring complex electrical admittance and/or complex electrical impedance in animal or human patients includes a first electrode and at least a second electrode which are adapted to be disposed in the patient. The apparatus includes a housing adapted to be disposed in the patient. The housing has disposed in it a stimulator in electrical communication with at least the first electrode to stimulate the first electrode with either current or voltage, a sensor in electrical communication with at least the second electrode to sense a response from the second electrode based on the stimulation of the first electrode, and a signal processor in electrical communication with the sensor to determine the complex electrical admittance or impedance of the patient.
    Type: Application
    Filed: March 20, 2012
    Publication date: January 24, 2013
    Inventors: Jonathan W. Valvano, Marc D. Feldman, John Porterfield, John A. Pearce, Erik Larson, Lev Shuhatovich, Kathryn Loeffler, Raffaele Cetrulo
  • Patent number: 7915570
    Abstract: A smart camera includes an integrated lighting current controller and can couple to one or more external light sources. The integrated lighting current controller can control and power the one or more external light sources using a current pulse. The one or more external light sources can provide illumination for the smart camera to acquire the image of an object under test.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: March 29, 2011
    Assignee: National Instruments Corporation
    Inventors: Raffaele A. Cetrulo, William M. Allai, Anita L. Salmon, Darin J. Shaw, Nicolas Vazquez
  • Publication number: 20090033761
    Abstract: A smart camera includes an integrated lighting current controller and can couple to one or more external light sources. The integrated lighting current controller can control and power the one or more external light sources using a current pulse. The one or more external light sources can provide illumination for the smart camera to acquire the image of an object under test.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 5, 2009
    Inventors: Raffaele A. Cetrulo, William M. Allai, Anita L. Salmon, Darin J. Shaw, Nicolas Vazquez
  • Patent number: 7480126
    Abstract: A protection and voltage monitoring circuit that may provide the functionality of a diode without the typical large voltage drop and power dissipation. The protection and voltage monitoring circuit may include a first MOSFET, a second MOSFET, a first resistor, an input terminal, an output terminal, a diode, a BJT current source, and a voltage monitoring circuit. The BJT current source may limit a gate-to-source voltage of the two MOSFETs to a predetermined voltage that is less than a maximum allowed voltage by controlling a current flow through the first resistor to prevent damage to the MOSFETs. The voltage monitoring circuit may determine whether an external voltage is within an allowable range of voltages. If the external voltage is outside the predetermined voltage range, the voltage monitoring circuit turns off the BJT current source to block the external voltage from the output terminal of the protection and voltage monitoring circuit.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: January 20, 2009
    Assignee: National Instruments Corporation
    Inventors: Raffaele Cetrulo, Mark Whittington
  • Patent number: 7239184
    Abstract: A low power and high efficiency voltage-to-current (V/I) converter designed with few parts and having improved power supply rejection. The V/I converter may include an op-amp, a MOSFET, and a first and second voltage dividers. The first voltage divider circuit may include a first, second, third, and fourth resistors. A source terminal of the MOSFET may be connected to a junction of the third and fourth resistors and the fourth resistor may be connected to a positive supply rail. Also, an inverting input terminal of the op-amp may be coupled to a junction of the second and third resistors. Additionally, the second resistor may be coupled to the first resistor, which may be connected to an input terminal of the V/I converter. The V/I converter typically has very good DC rejection of the power supply because the first and second voltage dividers are designed to have the same ratios.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: July 3, 2007
    Assignee: National Instruments Corporation
    Inventors: Raffaele Cetrulo, Mark Whittington
  • Publication number: 20060245133
    Abstract: A protection and voltage monitoring circuit that may provide the functionality of a diode without the typical large voltage drop and power dissipation. The protection and voltage monitoring circuit may include a first MOSFET, a second MOSFET, a first resistor, an input terminal, an output terminal, a diode, a BJT current source, and a voltage monitoring circuit. The BJT current source may limit a gate-to-source voltage of the two MOSFETs to a predetermined voltage that is less than a maximum allowed voltage by controlling a current flow through the first resistor to prevent damage to the MOSFETs. The voltage monitoring circuit may determine whether an external voltage is within an allowable range of voltages. If the external voltage is outside the predetermined voltage range, the voltage monitoring circuit turns off the BJT current source to block the external voltage from the output terminal of the protection and voltage monitoring circuit.
    Type: Application
    Filed: April 27, 2005
    Publication date: November 2, 2006
    Inventors: Raffaele Cetrulo, Mark Whittington
  • Publication number: 20060244494
    Abstract: A low power and high efficiency voltage-to-current (V/I) converter designed with few parts and having improved power supply rejection. The V/I converter may include an op-amp, a MOSFET, and a first and second voltage dividers. The first voltage divider circuit may include a first, second, third, and fourth resistors. A source terminal of the MOSFET may be connected to a junction of the third and fourth resistors and the fourth resistor may be connected to a positive supply rail. Also, an inverting input terminal of the op-amp may be coupled to a junction of the second and third resistors. Additionally, the second resistor may be coupled to the first resistor, which may be connected to an input terminal of the V/I converter. The V/I converter typically has very good DC rejection of the power supply because the first and second voltage dividers are designed to have the same ratios.
    Type: Application
    Filed: April 27, 2005
    Publication date: November 2, 2006
    Inventors: Raffaele Cetrulo, Mark Whittington