Abstract: Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable.

Abstract: Methods and systems for a sampled loop filter in a phase locked loop (PLL) may comprise a phase locked loop (PLL) comprising a phase frequency detector, a sampled loop filter comprising a plurality of capacitors and at least one switch, a plurality of voltage controlled oscillators (VCOs) coupled to said sampled loop filter, and a frequency divider. The PLL generates at least one clock signal, and the sampled loop filter samples an output signal from the phase frequency detector when an average of charge provided to a first of the plurality of capacitors in the sampled loop filter is zero. The frequency divider may be a fractional-N divider. A second switch in said sampled loop filter may have switching times that are non-overlapping with switching times of the at least one switch. Capacitors may be coupled to ground from each terminal of the second switch.

Abstract: Methods and systems for a sampled loop filter in a phase locked loop (PLL) may comprise a phase locked loop (PLL) comprising a phase frequency detector, a sampled loop filter comprising a plurality of capacitors and at least one switch, a plurality of voltage controlled oscillators (VCOs) coupled to said sampled loop filter, and a frequency divider. The PLL generates at least one clock signal, and the sampled loop filter samples an output signal from the phase frequency detector when an average of charge provided to a first of the plurality of capacitors in the sampled loop filter is zero. The frequency divider may be a fractional-N divider. A second switch in said sampled loop filter may have switching times that are non-overlapping with switching times of the at least one switch. Capacitors may be coupled to ground from each terminal of the second switch.

Abstract: Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable.

Abstract: Examples are provided for a multi-stage track-and-hold circuit (THA). The multi-stage THA may include a first stage, a second stage, and a third stage. The first stage may be coupled to an input signal and configured to sample the input signal. The second stage may be coupled to the first stage and may include a buffer circuit. The third stage may be coupled to the second stage and can include a bootstrapped THA. The first stage may further include a shunted source-follower circuit and a switched source-follower circuit. The shunted source-follower circuit may include a first switch that can be operable to couple an output node of the shunted source-follower circuit to ground potential.

Abstract: Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable.

Abstract: Examples are provided for a multi-stage track-and-hold circuit (THA). The multi-stage THA may include a first stage, a second stage, and a third stage. The first stage may be coupled to an input signal and configured to sample the input signal. The second stage may be coupled to the first stage and may include a buffer circuit. The third stage may be coupled to the second stage and can include a bootstrapped THA. The first stage may further include a shunted source-follower circuit and a switched source-follower circuit. The shunted source-follower circuit may include a first switch that can be operable to couple an output node of the shunted source-follower circuit to ground potential.

Abstract: Examples are provided for a multi-stage track-and-hold amplifier (THA). The multi-stage THA may include a first stage, a second stage, and a third stage. The first stage may be coupled to an input signal and configured to sample the input signal. The second stage may be coupled to the first stage and may include a buffer circuit. The third stage may be coupled to the second stage and can include a bootstrapped THA. The first stage may further include a shunted source-follower circuit and a switched source-follower circuit. The shunted source-follower circuit may include a first switch that can be operable to couple an output node of the shunted source-follower circuit to ground potential.