Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: Aspects of the invention relate to techniques for compensating flare effects in a lithographic process for an array of identical circuits to be fabricated on a wafer. According to various implementations of the invention, a reference circuit is selected from the array of identical circuits and intolerable flare difference regions are determined based on flare difference layers and tolerable flare difference layers. The lithographic process result for the array of identical circuit may be derived from that for the reference circuit and the intolerable flare difference regions.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: Aspects of the invention relate to techniques for compensating flare effects in a lithographic process for an array of identical circuits to be fabricated on a wafer. According to various implementations of the invention, a reference circuit is selected from the array of identical circuits and intolerable flare difference regions are determined based on flare difference layers and tolerable flare difference layers. The lithographic process result for the array of identical circuit may be derived from that for the reference circuit and the intolerable flare difference regions.

Abstract: An autonomic grid. The autonomic grid can include a multiplicity of hosting services communicatively coupled to one another. Each hosting service can include an administrative service configured to determine whether to deploy requested Web services locally or remotely; a code base for storing implementations of the requested Web services; and, a deployment service configured to deploy on command the implementations stored in the code base. Notably, at least one of the hosting services further can include one or more Web services instances; one or more monitors configured to proxy requests to and responses from the Web services instances; and, one or more agents subscribed to the monitors to analyze the requests to and responses from the Web services instances, and to provision Web services in others of the hosting services based upon the analysis.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: A self-healing and self-optimizing grid architecture can be provided in accordance with the present invention. Specifically, the architecture can include a mechanism for detecting component failures, and even degraded component performance, within peer components in a hosting service. Once a failure has been detected, the detecting peer to undertake remedial action to recreate and redeploy the component in the hosting system. In particular, the detecting component can acquire the behavior of the failed component and the detecting component can instantiate an instance of the behavior in another server in the grid. Thus, the mechanism described herein can be analogized to biotechnical DNA as every component in the hosting service can maintain an awareness of the state of the entire system and can recreate the entire system through knowledge provided by grid services DNA.

Abstract: A self-governing, self-healing and self-optimizing policy oriented grid architecture. The architecture can include a hosting service configured for use in a computing grid. The hosting service can include a Web service; grid instrumentation coupled to the Web service; a Web service descriptive document; and, a service policy element disposed in the Web service descriptive document. The Web service descriptive document can include a WSDL type document. Moreover, at least one WSLA can be referenced in the WSDL type document. Notably, the service policy element can include at least one policy selected from the group consisting of a security assertion and a business rule. The security assertion can include a security assertion markup language (SAML) formatted authentication statement having a subject specifying a role identifier.

Abstract: An autonomic grid. The autonomic grid can include a multiplicity of hosting services communicatively coupled to one another. Each hosting service can include an administrative service configured to determine whether to deploy requested Web services locally or remotely; a code base for storing implementations of the requested Web services; and, a deployment service configured to deploy on command the implementations stored in the code base. Notably, at least one of the hosting services further can include one or more Web services instances; one or more monitors configured to proxy requests to and responses from the Web services instances; and, one or more agents subscribed to the monitors to analyze the requests to and responses from the Web services instances, and to provision Web services in others of the hosting services based upon the analysis.

Abstract: A self-healing and self-optimizing grid architecture can be provided in accordance with the present invention. Specifically, the architecture can include a mechanism for detecting component failures, and even degraded component performance, within peer components in a hosting service. Once a failure has been detected, the detecting peer to undertake remedial action to recreate and redeploy the component in the hosting system. In particular, the detecting component can acquire the behavior of the failed component and the detecting component can instantiate an instance of the behavior in another server in the grid. Thus, the mechanism described herein can be analogized to biotechnical DNA as every component in the hosting service can maintain an awareness of the state of the entire system and can recreate the entire system through knowledge provided by grid services DNA.