Patents by Inventor Raghunath Krishna Rao

Raghunath Krishna Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200284873
    Abstract: A radar sensing system for a vehicle has multiple transmitters and receivers on a vehicle. The transmitters are configured to transmit radio signals which are reflected off of objects in the environment. There are one or more receivers that receive the reflected radio signals. Each receiver has an antenna, a radio frequency front end, an analog-to-digital converter (ADC), and a digital signal processor. The transmitted signals are based on spreading codes generated by a programmable code generation unit. The receiver also makes use of the spreading codes generated by the programmable code generation unit. The programmable code generation unit is configured to selectively generate particular spreading codes that have desired properties.
    Type: Application
    Filed: May 27, 2020
    Publication date: September 10, 2020
    Inventors: Monier Maher, Jean Pierre Bordes, Wayne E. Stark, Raghunath Krishna Rao, Frederick Rush, Curtis Davis, Srikanth Gollapudi, Steve Borho, Murtaza Ali
  • Patent number: 10670695
    Abstract: A radar sensing system for a vehicle has multiple transmitters and receivers on a vehicle. The transmitters are configured to transmit radio signals which are reflected off of objects in the environment. There are one or more receivers that receive the reflected radio signals. Each receiver has an antenna, a radio frequency front end, an analog-to-digital converter (ADC), and a digital signal processor. The transmitted signals are based on spreading codes generated by a programmable code generation unit. The receiver also makes use of the spreading codes generated by the programmable code generation unit. The programmable code generation unit is configured to selectively generate particular spreading codes that have desired properties.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: June 2, 2020
    Assignee: Uhnder, Inc.
    Inventors: Monier Maher, Jean Pierre Bordes, Wayne E. Stark, Raghunath Krishna Rao, Frederick Rush, Curtis Davis, Srikanth Gollapudi, Steve Borho, Murtaza Ali
  • Publication number: 20180231656
    Abstract: A radar sensing system for a vehicle has multiple transmitters and receivers on a vehicle. The transmitters are configured to transmit radio signals which are reflected off of objects in the environment. There are one or more receivers that receive the reflected radio signals. Each receiver has an antenna, a radio frequency front end, an analog-to-digital converter (ADC), and a digital signal processor. The transmitted signals are based on spreading codes generated by a programmable code generation unit. The receiver also makes use of the spreading codes generated by the programmable code generation unit. The programmable code generation unit is configured to selectively generate particular spreading codes that have desired properties.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 16, 2018
    Inventors: Monier Maher, Jean Pierre Bordes, Wayne E. Stark, Raghunath Krishna Rao, Frederick Rush, Curtis Davis, Srikanth Gollapudi, Steve Borho, Murtaza Ali
  • Patent number: 7000138
    Abstract: An adaptive clock throttle 600 interfacing a clock generator 601 generating a high speed clock and a processing engine 602 operating in response to a processing clock. Adaptive clock throttle 600 generates a plurality of lower speed clocks from the high speed clock, estimates a duty cycle of the processing engine, and selectively gates one of the lower speed clocks to the processing engine as the processing clock to increase the duty cycle of the processing engine.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: February 14, 2006
    Assignee: Cirrus Logic, INC
    Inventors: Sanjay Ramakrishna Pillay, Raghunath Krishna Rao, Hasibur Rahman, Girish Subramaniam
  • Patent number: 6948098
    Abstract: A debugging subsystem for testing a system-on-a-chip includes an embedded processor and memory and includes at least one debugging subblock monitors a bus between the processor and the memory to detect selected triggering events, counts the number of triggering events detected and when the number of triggering events reaches a predetermined threshold, generates a debugging signal.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: September 20, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Sanjay Ramakrishna Pillay, Raghunath Krishna Rao
  • Publication number: 20030051192
    Abstract: A debugging subsystem for testing a system-on-a-chip includes an embedded processor and memory and includes at least one debugging subblock monitors a bus between the processor and the memory to detect selected triggering events, counts the number of triggering events detected and when the number of triggering events reaches a predetermined threshold, generates a debugging signal.
    Type: Application
    Filed: March 30, 2001
    Publication date: March 13, 2003
    Inventors: Sanjay Ramakrishna Pillay, Raghunath Krishna Rao
  • Patent number: 6504496
    Abstract: A method of decoding an encoded bitstream. The method includes performing a two-table lookup. A first table is addressed in response to a first plurality of bits from the bitstream. An address into a second table is generated using a value in an entry in said first table accessed in the addressing step. A value (representing the decoded value corresponding to the codeword in the bitstream) in an entry in said second table at the address from the generating step is output.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: January 7, 2003
    Assignee: Cirrus Logic, Inc.
    Inventors: Vladimir Mesarovic, Raghunath Krishna Rao, Miroslav Dokic, Sachin Sunil Deo, Nariankadu Datareya Hemkumar
  • Patent number: 6356871
    Abstract: A method for synchronizing stream processing with a locally generated system time clock is disclosed. A program clock reference is recovered from a transport layer and used to vary the frequency of the locally generated system time clock. A presentation time stamp is recovered from a packetized elementary stream derived from the transport layer. The relationship between a reference sample associated with the presentation time stamp from the packetized elementary stream and a current sample being streamed is determined relative to the system time clock. Data samples are added or subtracted from a stream of data samples being streamed in response to the step of determining to establish a relationship between the stream of samples and the presentation time stamp relative to the system time clock.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: March 12, 2002
    Assignee: Cirrus Logic, Inc.
    Inventors: Nariankadu Datatreya Hemkumar, Miroslav Dokic, Raghunath Krishna Rao