Patents by Inventor Rahim Kavari

Rahim Kavari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120167819
    Abstract: The disclosed subject matter pertains to deposition of thin film or thin foil materials in general, but more specifically to deposition of epitaxial monocrystalline or quasi-monocrystalline silicon film (epi film) for use in manufacturing of high efficiency solar cells. In operation, methods are disclosed which extend the reusable life and to reduce the amortized cost of a substrate or template used in the manufacturing process of silicon solar cells. Further, methods are disclosed which provide for the conversion of a low quality starting surface into an improved quality starting surface of a silicon wafer.
    Type: Application
    Filed: December 31, 2011
    Publication date: July 5, 2012
    Applicant: SOLEXEL, INC.
    Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, David Xuan-Qi Wang, Rahim Kavari, Rafael Ricolcol, Jay Ashjaee
  • Publication number: 20120125256
    Abstract: Mechanisms are disclosed by which a semiconductor wafer, silicon in some embodiments, is repeatedly used to serve as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates. Mechanisms that enable such repeated use of these templates at consistent quality and with high yield are disclosed.
    Type: Application
    Filed: August 13, 2011
    Publication date: May 24, 2012
    Applicant: SOLEXEL, INC.
    Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, David Xuan-Qi Wang, Subramanian Tamilmani, Sam Tone Tor, Rahim Kavari, Rafael Ricolcol, George Kamian, Joseph Leigh
  • Publication number: 20080131655
    Abstract: Carbon nanotube-based structures and methods for removing heat from solid-state devices are disclosed. In one embodiment, a copper substrate has thermal interface materials on top of front and back surfaces of the copper substrate. Each thermal interface material (TIM) comprises a layer of carbon nanotubes and a filler material located between the carbon nanotubes. The summation of the thermal resistance of the copper substrate, the bulk thermal resistance of each TIM, the contact resistance between each TIM and the copper substrate, the contact resistance between one TIM and a solid-state device, and the contact resistance between the other TIM and a heat conducting surface has a value of 0.06 cm2K/W or less.
    Type: Application
    Filed: May 15, 2007
    Publication date: June 5, 2008
    Inventors: Barbara Wacker, Ephraim Suhir, Subrata Dey, Peter Schwartz, Rahim Kavari
  • Patent number: 6548343
    Abstract: An embodiment of the instant invention is a method of fabricating a ferroelectric capacitor which is situated over a structure, the method comprising the steps of: forming a bottom electrode on the structure (124 of FIG. 1), the bottom electrode having a top surface and sides; forming a capacitor dielectric (126 of FIG. 1) comprised of a ferroelectric material on the bottom electrode, the capacitor dielectric having a top surface and sides; forming a top electrode (128 and 130 of FIG. 1) on the capacitor dielectric, the top electrode having a top surface and sides, the ferroelectric capacitor is comprised of the bottom electrode, the capacitor dielectric, and the top electrode; forming a barrier layer (118 and 120 of FIG.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: April 15, 2003
    Assignee: Agilent Technologies Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Theodore S. Moise, Guoqiang Xing, Luigi Colombo, Tomoyuki Sakoda, Stephen R. Gilbert, Alvin L. S. Loke, Shawming Ma, Rahim Kavari, Laura Wills-Mirkarimi, Jun Amano
  • Patent number: 6485988
    Abstract: An embodiment of the instant invention is a method of forming a conductive contact to a top electrode (308 and 310 of FIG. 4d) of a ferroelectric capacitor comprised of a bottom electrode (304 of FIG. 4d) situated under the top electrode and a ferroelectric material (306 of FIG. 4d) situated between the top electrode and the bottom electrode, the method comprising the steps of: forming a layer (408 or 312 of FIG. 4) over the top electrode; forming an opening (414 of FIG. 4d) in the layer to expose a portion of the top electrode by etching the opening into the layer using a hydrogen-free etchant; and depositing conductive material (432 of FIG. 4d) in the opening to form an electrical connection with the top electrode.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: November 26, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Shawming Ma, Guoqiang Xing, Rahim Kavari, Scott R. Summerfelt, Tomoyuki Sakoda
  • Publication number: 20020006674
    Abstract: An embodiment of the instant invention is a method of forming a conductive contact to a top electrode (308 and 310 of FIG. 4d) of a ferroelectric capacitor comprised of a bottom electrode (304 of FIG. 4d) situated under the top electrode and a ferroelectric material (306 of FIG. 4d) situated between the top electrode and the bottom electrode, the method comprising the steps of: forming a layer (408 or 312 of FIG. 4) over the top electrode; forming an opening (414 of FIG. 4d) in the layer to expose a portion of the top electrode by etching the opening into the layer using a hydrogen-free etchant; and depositing conductive material (432 of FIG. 4d) in the opening to form an electrical connection with the top electrode.
    Type: Application
    Filed: December 19, 2000
    Publication date: January 17, 2002
    Inventors: Shawming Ma, Guoqiang Xing, Rahim Kavari, Scott R. Summerfelt, Tomoyuki Sakoda