Patents by Inventor Rahul Garg

Rahul Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8290033
    Abstract: A system is described for performing combined equalization. The system comprises a time domain equalizer (TEQ) configured to receive a signal and shorten a CIR (channel impulse response) of the received signal, a Fast Fourier Transform (FFT) module for demodulating the received signal, and an equalization block for reducing inter-carrier interference (ICI) and inter-symbol interference (ISI). The equalization block comprises at least one of: a feed forward equalizer and a feed back equalizer. The system further comprises a slicer circuit configured to generate a hard-limited decision for a symbol corresponding to the received signal.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: October 16, 2012
    Assignee: Ikanos Communications, Inc.
    Inventors: Rahul Garg, Kunal Lal, Devesh Chauhan, Patrick Duvaut
  • Patent number: 8275067
    Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: September 25, 2012
    Assignee: Ikanos Communications, Inc.
    Inventors: Rahul Garg, Patrick Duvaut, Harish Jethanandani, Amitkumar Mahadevan
  • Patent number: 8213536
    Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 3, 2012
    Assignee: Ikanos Communications, Inc.
    Inventors: Harish Jethanandani, Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan
  • Patent number: 8176340
    Abstract: A method and system for managing communications between sub-systems of a communication device. The sub-systems include a Radio Frequency Integrated Circuit (RFIC) and a Baseband Integrated Circuit (BBIC). The BBIC includes a processing engine, a state machine module and an interface module. The method includes initializing a Digital Radio Frequency Third Generation (DigRF3G) interface between the RFIC and the BBIC. The processing engine is kept functionally inactive during the initialization process of the DigRF3G interface. Further, the method includes exchanging one or more packets between the RFIC and the BBIC.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: May 8, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nandan Tripathi, Rahul Garg, Vivek Goel, Rajan Kapoor, Sachin Prakash
  • Patent number: 8141044
    Abstract: A method for tuning performance of an operating system, the method comprising identifying all sources of operating system jitter; measuring the impact of each of the operating system jitter source; and tuning performance of the operating system, preferably by use of different approaches/techniques, which could include removing the sources of operating system jitter and/or delaying their execution and/or smoothening their execution over a longer period of time. Computer program code and systems are also provided.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Vijay Mann, Pradipta De, Ravi Kothari, Rahul Garg
  • Publication number: 20110293193
    Abstract: A spatio-temporal image of an object is reconstructed based on captured data characterizing the object. The spatio-temporal image comprises a plurality of spatial images in respective time intervals, and at least a given one of the spatial images in one of the time intervals is reconstructed using not only captured data from a frame associated with that time interval but also captured data associated with one or more additional frames associated with other time intervals. The spatio-temporal image may be reconstructed by iteratively obtaining a solution to a minimization or maximization problem in a sparse domain and transforming the solution to an image domain. The transformation between the sparse domain and the image domain may utilize a spatio-temporal transformation implemented using a plurality of basis functions, one or more of which may be determined at least in part based on secondary information associated with the imaged object.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 1, 2011
    Applicant: International Business Machines Corporation
    Inventors: Rahul Garg, Monu Kedia, Yogish Sabharwal
  • Patent number: 8050371
    Abstract: A method and system for compensating for the effect of phase drift in a data sampling clock during data transfer between sub-systems of an electronic device. The sub-systems of the electronic device transfer data frame by frame. Each frame includes multiple data windows. Each data window includes multiple data bits. The method includes sampling each of the one or more data bits of a data window at one or more early instances, a prompt instance, and one or more late instances. Further, the method includes calculating the phase-error value of the sampled data window, based on the data sampled. Furthermore, the method includes compensating for the effect of phase drift in the data sampling clock, based on the calculated phase error value.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: November 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rahul Garg, Nandan Tripathi
  • Patent number: 7978756
    Abstract: Systems and methods for monitoring impulse noise are described. At least one embodiment is a method, which comprises detecting whether impulse noise is present and in response to detecting the presence of impulse noise, performing time domain analysis to determine whether one or more impulse noise sources are present based on minimum interarrival time and maximum impulse length. The method further includes performing frequency domain analysis to estimate frequencies associated with the one or more impulse noise sources and based on the time domain analysis and frequency domain analysis, providing a total number of impulse noise sources and frequencies associated with the impulse noise sources. In this regard, the embodiments described herein provide dual-speed monitoring of impulse noise in the form of short-term and long-term monitoring.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Ikanos Communications, Inc.
    Inventors: Hemant Samdani, Kunal Raheja, Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan, Robert A. Day, Robin Levonas
  • Patent number: 7974181
    Abstract: Systems and methods for reducing the peak-to-average power ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal in the oversampled regime, using tones reserved for PAR reduction. A set of vectors corresponding to PAR tones is generated by processing out-of-phase symbols for each PAR tone to form a span matrix. The span matrix is used to find a best fit of a desired target signal to a time-domain compensation signal comprising only PAR tones.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 5, 2011
    Assignee: Ikanos Communications, Inc.
    Inventors: Amitkumar Mahadevan, Patrick Duvaut, Harish Jethanandani, Rahul Garg
  • Publication number: 20110052023
    Abstract: A method for reconstructing an image includes steps of obtaining a measurement in a first domain, generating an estimate of the image in a second domain based at least in part on the measurement, generating a sparse representation in a third domain based at least in part on the estimate, and performing one or more iterations until the estimate is determined to satisfy one or more image quality criteria. A given iteration includes steps of generating a projection in the first domain based at least in part on the sparse representation, updating the sparse representation based at least in part on the projection, and updating the estimate based at least in part on the sparse representation. The method further includes a step of outputting the estimate determined to satisfy the one or more image quality criteria for use as the image.
    Type: Application
    Filed: August 28, 2009
    Publication date: March 3, 2011
    Applicant: International Business Machines Corporation
    Inventors: Rahul Garg, Rohit Madhukar Khandekar, Charles Clyde Peck, III, Nils Petter Smeds
  • Patent number: 7793170
    Abstract: A novel technique for combining deinterleaving operation with Fast Fourier Transformer (FFT) modules and other post FFT modules in a receiver to reduce processing time. In one example embodiment, the deinterleaving operation, in the post FFT module, is combined with FFT and demapper operations to reduce the processing time and complexity.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: September 7, 2010
    Assignee: Ittiam Systems (P) Ltd.
    Inventors: Roshan Rajendra Baliga, Rahul Garg, Rajendra Kumar, Sreenath Ramanath
  • Publication number: 20100177815
    Abstract: A system is described for performing combined equalization. The system comprises a time domain equalizer (TEQ) configured to receive a signal and shorten a CIR (channel impulse response) of the received signal, a Fast Fourier Transform (FFT) module for demodulating the received signal, and an equalization block for reducing inter-carrier interference (ICI) and inter-symbol interference (ISI). The equalization block comprises at least one of: a feed forward equalizer and a feed back equalizer. The system further comprises a slicer circuit configured to generate a hard-limited decision for a symbol corresponding to the received signal.
    Type: Application
    Filed: January 9, 2009
    Publication date: July 15, 2010
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Rahul Garg, Kunal Lal, Devesh Chauhan, Patrick Duvaut
  • Patent number: 7680229
    Abstract: A method of determining a synchronous phase includes receiving a correlation sequence, and selecting one or more correlated signals from the correlation sequence. Then, when the number of selected correlated signals is odd, the synchronous phase corresponding to a central correlated signal is selected.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: March 16, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Rahul Garg
  • Publication number: 20100061437
    Abstract: Impulse noise from nearby or intense electrical sources can disrupt communications over digital subscriber lines (DSL). The characterization of the nature, timing and length of impulse noise sources present on a DSL loop is a critical first step in mitigating the effect of impulse noise on DSL communications. DSL standards provide histograms for impulse length and inter-arrival time of impulses. These histograms can be used to derive the nature, maximum frequency and other statistics related to impulse noise on a DSL line.
    Type: Application
    Filed: January 5, 2009
    Publication date: March 11, 2010
    Applicant: Conexant Systems, Inc.
    Inventors: Hemant Samdani, Kunal Raheja, Rahul Garg, Amitkumar Mahadevan, Patrick Duvaut
  • Patent number: 7676000
    Abstract: A technique for signal distortion compensation using a filter that can support a higher delay spread distortion without substantially increasing hardware complexity. In one example embodiment, an adaptive receiver design compensates for signal distortions with the use of non-uniform tap delay filters. The non-uniform tap delay filters are used to output an adaptively channel matched signal for decoding.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: March 9, 2010
    Assignee: Ittiam Systems (P) Ltd.
    Inventors: Rahul Garg, Shobha Ramaswamy, Kiran Devanahalli, Satyanarayana Sanpini
  • Publication number: 20090310659
    Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 17, 2009
    Applicant: Conexant Systems, Inc.
    Inventors: Rahul Garg, Patrick Duvaut, Harish Jethanandani, Amitkumar Mahadevan
  • Publication number: 20090310658
    Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 17, 2009
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan, Harish Jethanandani
  • Publication number: 20090310704
    Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 17, 2009
    Applicant: Conexant Systems, Inc.
    Inventors: Harish Jethanandani, Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan
  • Patent number: 7613981
    Abstract: A system and method for reducing power consumption in a Low Density Parity-Check Code (LDPC) decoder includes a sleep mode checking module and a gating circuit. The sleep mode checking module checks whether a check node is in sleep mode. The check node is considered to be in sleep mode when the absolute value of the message going to each of the one or more bit nodes corresponding to the check node is greater than a threshold value. The gating circuit turns OFF a Check Node and Bit Node Update Unit (CNBNU) associated with the check node when the check node is in the sleep mode. Turning OFF a CNBNU stops the exchange of messages between the check node and its corresponding one or more bit nodes.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: November 3, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rahul Garg, Amrit Singh
  • Publication number: 20090252234
    Abstract: Systems and methods for monitoring impulse noise are described. At least one embodiment is a method, which comprises detecting whether impulse noise is present and in response to detecting the presence of impulse noise, performing time domain analysis to determine whether one or more impulse noise sources are present based on minimum interarrival time and maximum impulse length. The method further includes performing frequency domain analysis to estimate frequencies associated with the one or more impulse noise sources and based on the time domain analysis and frequency domain analysis, providing a total number of impulse noise sources and frequencies associated with the impulse noise sources. In this regard, the embodiments described herein provide dual-speed monitoring of impulse noise in the form of short-term and long-term monitoring.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 8, 2009
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Hemant Samdani, Kunal Raheja, Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan, Robert A. Day, Robin Levonas