Patents by Inventor Rahul Lakhawat

Rahul Lakhawat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10949964
    Abstract: A system for analyzing a sample includes an inspection sub-system and at least one controller. The inspection sub-system is configured to scan a sample to collect a first plurality of sample images having a first image resolution. The controller is configured to generate a defect list based on the first plurality of sample images. The controller is further configured to input images corresponding to the defect list into a neural network that is trained with source data including sample images having the first image resolution and sample images having a second image resolution higher than the first image resolution. The controller is further configured to generate a second plurality of sample images with the neural network based on the images corresponding to the defect list, where the second plurality of sample images have the second image resolution and correspond to the defect list.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: March 16, 2021
    Assignee: KLA Corporation
    Inventors: Anuj Pandey, Bradley Ries, Himanshu Vajaria, Yong Zhang, Rahul Lakhawat
  • Publication number: 20200098101
    Abstract: A system for analyzing a sample includes an inspection sub-system and at least one controller. The inspection sub-system is configured to scan a sample to collect a first plurality of sample images having a first image resolution. The controller is configured to generate a defect list based on the first plurality of sample images. The controller is further configured to input images corresponding to the defect list into a neural network that is trained with source data including sample images having the first image resolution and sample images having a second image resolution higher than the first image resolution. The controller is further configured to generate a second plurality of sample images with the neural network based on the images corresponding to the defect list, where the second plurality of sample images have the second image resolution and correspond to the defect list.
    Type: Application
    Filed: November 5, 2018
    Publication date: March 26, 2020
    Inventors: Anuj Pandey, Bradley Ries, Himanshu Vajaria, Yong Zhang, Rahul Lakhawat
  • Patent number: 9996942
    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: June 12, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Santosh Bhattacharyya, Pavan Kumar, Lisheng Gao, Thirupurasundari Jayaraman, Raghav Babulnath, Srikanth Kandukuri, Gangadharan Sivaraman, Karthikeyan Subramanian, Raghavan Konuru, Rahul Lakhawat
  • Publication number: 20170076911
    Abstract: Systems and methods for discovering defects on a wafer are provided. One method includes detecting defects on a wafer by applying a threshold to output generated by a detector in a first scan of the wafer and determining values for features of the detected defects. The method also includes automatically ranking the features, identifying feature cut-lines to group the defect into bins, and, for each of the bins, determining one or more parameters that if applied to the values for the features of the defects in each of the bins will result in a predetermined number of the defects in each of the bins. The method also includes applying the one or more determined parameters to the output generated by the detector in a second scan of the wafer to generate a defect population that has a predetermined defect count and is diversified in the values for the features.
    Type: Application
    Filed: November 22, 2016
    Publication date: March 16, 2017
    Inventors: Hong Chen, Kenong Wu, Martin Plihal, Vidur Pandita, Ravikumar Sanapala, Vivek Bhagat, Rahul Lakhawat, Oksen Baris, Rajesh Ramachandran, Naoshin Haque
  • Patent number: 9518934
    Abstract: Systems and methods for discovering defects on a wafer are provided. One method includes detecting defects on a wafer by applying a threshold to output generated by a detector in a first scan of the wafer and determining values for features of the detected defects. The method also includes automatically ranking the features, identifying feature cut-lines to group the defect into bins, and, for each of the bins, determining one or more parameters that if applied to the values for the features of the defects in each of the bins will result in a predetermined number of the defects in each of the bins. The method also includes applying the one or more determined parameters to the output generated by the detector in a second scan of the wafer to generate a defect population that has a predetermined defect count and is diversified in the values for the features.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: December 13, 2016
    Assignee: KLA-Tencor Corp.
    Inventors: Hong Chen, Kenong Wu, Martin Plihal, Vidur Pandita, Ravikumar Sanapala, Vivek Bhagat, Rahul Lakhawat, Oksen Baris, Rajesh Ramachandran, Naoshin Haque
  • Publication number: 20160275672
    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 22, 2016
    Inventors: Santosh Bhattacharyya, Pavan Kumar, Lisheng Gao, Thirupurasundari Jayaraman, Raghav Babulnath, Srikanth Kandukuri, Gangadharan Sivaraman, Karthikeyan Subramanian, Raghavan Konuru, Rahul Lakhawat
  • Publication number: 20160123898
    Abstract: Systems and methods for discovering defects on a wafer are provided. One method includes detecting defects on a wafer by applying a threshold to output generated by a detector in a first scan of the wafer and determining values for features of the detected defects. The method also includes automatically ranking the features, identifying feature cut-lines to group the defect into bins, and, for each of the bins, determining one or more parameters that if applied to the values for the features of the defects in each of the bins will result in a predetermined number of the defects in each of the bins. The method also includes applying the one or more determined parameters to the output generated by the detector in a second scan of the wafer to generate a defect population that has a predetermined defect count and is diversified in the values for the features.
    Type: Application
    Filed: November 3, 2015
    Publication date: May 5, 2016
    Inventors: Hong Chen, Kenong Wu, Martin Plihal, Vidur Pandita, Ravikumar Sanapala, Vivek Bhagat, Rahul Lakhawat, Oksen Baris, Rajesh Ramachandran, Naoshin Haque