Abstract: Disclosed herein are devices comprising stretchable 3D circuits and methods for fabricating the circuits. The fabrication process includes providing in the elastomeric polymer as a substrate and providing conductive interconnects within the substrate encased in an insulating polymer, such as polyimide, to provide a stiffness gradient between the conductive interconnects and the flexible elastomeric substrate. The circuit may be fabricated as a multilayer construction using three-dimensional pillars as vias and as external interconnects to the circuit.

Abstract: Disclosed herein are devices comprising stretchable 3D circuits and methods for fabricating the circuits. The fabrication process includes providing in the elastomeric polymer as a substrate and providing conductive interconnects within the substrate encased in an insulating polymer, such as polyimide, to provide a stiffness gradient between the conductive interconnects and the flexible elastomeric substrate. The circuit may be fabricated as a multilayer construction using three-dimensional pillars as vias and as external interconnects to the circuit.

Abstract: Provided here is a method of manufacturing a lattice electrode useful in an energy storage device such as a battery or capacitor. A lattice electrode useful in an energy storage device such as a battery or capacitor also is provided, along with energy storage devices such as batteries or capacitors.

Abstract: A method of preparing a functionalized electrode array is provided. The method includes depositing a conductive material onto the surface of a substrate by droplet-based printing of particles comprising an electrically-conductive material. The surface of the conductive material is functionalized with a binding reagent that binds to an analyte. A three-dimensional electrode array and microfluidic test device are also provided.

Abstract: Disclosed herein are devices comprising stretchable 3D circuits and methods for fabricating the circuits. The fabrication process includes providing in the elastomeric polymer as a substrate and providing conductive interconnects within the substrate encased in an insulating polymer, such as polyimide, to provide a stiffness gradient between the conductive interconnects and the flexible elastomeric substrate. The circuit may be fabricated as a multilayer construction using three-dimensional pillars as vias and as external interconnects to the circuit.

Abstract: Disclosed herein are methods of synthesizing a hybrid nanomaterial comprising 3D out-of-plane single- to few-layer fuzzy graphene on a scaffold, such as a Si nanowire mesh through a plasma-enhanced chemical vapor deposition process. By varying graphene growth conditions (CH4 partial pressure and process time), the size, density, and electrical properties of the hybrid nanomaterial can be controlled. Porous nanowire-templated 3D graphene hybrid nanomaterials exhibit high electrical conductivity and also demonstrate exceptional electrochemical functionality.

Abstract: A high-density bioprobe array is provided comprising conductive or optical shanks. A method of making high-density bioprobe arrays also is provided. A bioprobe system using the array also is provided.

Abstract: Provided here is a method of manufacturing a lattice electrode useful in an energy storage device such as a battery or capacitor. A lattice electrode useful in an energy storage device such as a battery or capacitor also is provided, along with energy storage devices such as batteries or capacitors.

Abstract: Novel methods for micro-additive manufacturing three dimensional sub-millimeter components are disclosed herein. The methods can include dispensing a dielectric at positions on a substrate so as to provide dielectric structures having an aspect ratio of up to 1:20. The methods can also include in-situ curing of the dielectric structure upon dispensing of the dielectric wherein the dispensing and curing steps provide for three dimensional configurations. Direct printing a metal nanoparticle solution on the dielectric to create conductive traces and thereafter sintering the printed nanoparticle solution so as to cure the conductive traces enables three dimensional conductive (antenna) elements having a length and width scale of down to 1 ?m.

Abstract: A fiber grating device of low cost and arbitrary length is formed on a portion of a portion or the entirety of a highly elastic fiber optic core having a low Young's modulus of elasticity by causing elongation of the fiber optic core and forming or depositing a hard skin or cladding on the elongated fiber optic core. When the stress is then released, the hard skin or cladding buckles (including elastic or plastic deformation or both) to form wrinkles at the interface of the fiber optic core and the hard skin or cladding which are oriented circumferentially and highly uniform in height and spacing which can be varied at will by choice of materials, stretching, and thickness and composition of the cladding. Since the elastic elongation of the fiber optic core portion may be 200% or greater, an unprecedented measurement range is provided.

Abstract: Techniques for forming highly stretchable electronic interconnect devices are disclosed herein. In one embodiment, a method of fabricating an electronic interconnect device includes forming a layer of an adhesion material onto a surface of a substrate material capable of elastic and/or plastic deformation. The formed layer of the adhesion material has a plurality of adhesion material portions separated from one another on the surface of the substrate material. The method also includes depositing a layer of an interconnect material onto the formed layer of the adhesion material. The deposited interconnect material has regions that are not bonded or loosely bonded to corresponding regions of the substrate material, such that the interconnect material may be deformed more than the adhesion material attached to the substrate material. In certain embodiments, the interconnect material can also include a plurality of wrinkles on a surface facing away from the substrate material.

Abstract: Methods and devices including the formation of a layer of nanowires on wiring line traces are described. One device comprises a first dielectric layer and a plurality of traces on the first dielectric layer, the traces comprising Cu. The traces include a layer of ZnO nanowires positioned thereon. A second dielectric layer is positioned on the first dielectric layer and on the traces, wherein the second dielectric layer is in direct contact with the ZnO nanowires. Other embodiments are described and claimed.

Abstract: A fiber grating device of low cost and arbitrary length is formed on a portion of a portion or the entirety of a highly elastic fiber optic core having a low Young's modulus of elasticity by causing elongation of the fiber optic core and forming or depositing a hard skin or cladding on the elongated fiber optic core. When the stress is then released, the hard skin or cladding buckles (including elastic or plastic deformation or both) to form wrinkles at the interface of the fiber optic core and the hard skin or cladding which are oriented circumferentially and highly uniform in height and spacing which can be varied at will by choice of materials, stretching, and thickness and composition of the cladding. Since the elastic elongation of the fiber optic core portion may be 200% or greater, an unprecedented measurement range is provided.

Abstract: Techniques for additive deposition are disclosed herein. In one embodiment, a method includes depositing a first portion of a precursor material onto a deposition platform, the precursor material including a suspension of nano-particles and forming a first solid structure of the nano-particles on the deposition platform from the deposited first layer of the precursor material. The method can also include depositing a second portion of the precursor material onto the formed first solid structure of the nano-particles and forming a second solid structure on the first solid structure from the deposited second layer of the precursor material. The three dimensional structure thus formed can be partly or fully cured or sintered during deposition or after deposition resulting in a controlled hierarchical porosity at multiple levels, from mesoscale (e.g., about 10 ?m to about 250 ?m) to nanoscale (e.g., about 900 nm or less) in the same structure.

Abstract: Techniques for forming highly stretchable electronic interconnect devices are disclosed herein. In one embodiment, a method of fabricating an electronic interconnect device includes forming a layer of an adhesion material onto a surface of a substrate material capable of elastic and/or plastic deformation. The formed layer of the adhesion material has a plurality of adhesion material portions separated from one another on the surface of the substrate material. The method also includes depositing a layer of an interconnect material onto the formed layer of the adhesion material. The deposited interconnect material has regions that are not bonded or loosely bonded to corresponding regions of the substrate material, such that the interconnect material may be deformed more than the adhesion material attached to the substrate material. In certain embodiments, the interconnect material can also include a plurality of wrinkles on a surface facing away from the substrate material.

Abstract: Novel methods for micro-additive manufacturing three dimensional sub-millimeter components are disclosed herein. The methods can include dispensing a dielectric at positions on a substrate so as to provide dielectric structures having an aspect ratio of up to 1:20. The methods can also include in-situ curing of the dielectric structure upon dispensing of the dielectric wherein the dispensing and curing steps provide for three dimensional configurations. Direct printing a metal nanoparticle solution on the dielectric to create conductive traces and thereafter sintering the printed nanoparticle solution so as to cure the conductive traces enables three dimensional conductive (antenna) elements having a length and width scale of down to 1 ?m.

Abstract: Methods and devices including the formation of a layer of nanowires on wiring line traces are described. One device comprises a first dielectric layer and a plurality of traces on the first dielectric layer, the traces comprising Cu. The traces include a layer of ZnO nanowires positioned thereon. A second dielectric layer is positioned on the first dielectric layer and on the traces, wherein the second dielectric layer is in direct contact with the ZnO nanowires. Other embodiments are described and claimed.

Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.

Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.

Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.