Abstract: A method for recovering C2 and higher weight hydrocarbons, or alternatively C3 and higher weight hydrocarbons, from off gas, such as refinery off gas, wherein the method avoids the need to significantly compress contaminated off gas in most cases, and is robust in response to pressure and temperature variations in the off gas feed.

Abstract: Data traffic, latency, and power consumption in a mobile unified communication environment are reduced by optimizing communication between a mobile client application and a mobile data server through determining optimum delay between exchanged messages and/or filtering portions of data not relevant to the mobile client application at the server. Additional optimizations include providing mobile client application relevant updates in an intelligent fashion based on user activity, screen resolution or displayed information, relevant contacts and relevance of information, and similar characteristics.

Abstract: Method and apparatus for metering network services, for example Web services. In embodiments, a network services metering system may collect network service usage information via an add usage interface and store the usage information in a database. In one embodiment, the usage information may be partitioned into two or more partitions. Once the usage information has been aggregated and stored, the metering system may be queried to obtain usage statistics such as aggregate usage over specific time intervals. In one embodiment, a pipeline mechanism that generates and processes batches of usage information may be implemented for adding usage information to the database. The pipeline mechanism may help to reduce or eliminate redundancy and loss of usage information, and may make the metering system linearly scalable in multiple dimensions.

Abstract: Network disconnections are automatically detected between a client application and a server When a disconnection is detected by either the client or server, a determination is made as to whether the disconnection is a temporary disconnection or a longer-lasting disconnection. While disconnected, attempts are made to automatically reconnect the client and server. During the disconnected period, a subset of communication functions remain operable. When the connection is restored, presence/availability information is automatically delivered to the client.

Abstract: Presence applications running on different devices are used to access and command devices through a communications server. A communication channel is established between at least two instances of a presence application that are running on different devices. A device that is associated with an instance of a presence application is remotely commanded by a received message from the communications server from another instance of the presence application on a different device.

Abstract: A telehealth communications network accessible anywhere sufficient bandwidth connection is available facilitates a medical encounter between a patient at a patient site and a provider at a provider site remotely located from the patient, and includes an operating console comprising at least one memory and at least one processor coupled to the network, the operating console configured to execute at least one workflow for facilitating the medical encounter.

Abstract: Data traffic, latency, and power consumption in a mobile unified communication environment are reduced by optimizing communication between a mobile client application and a mobile data server through determining optimum delay between exchanged messages and/or filtering portions of data not relevant to the mobile client application at the server. Additional optimizations include providing mobile client application relevant updates in an intelligent fashion based on user activity, screen resolution or displayed information, relevant contacts and relevance of information, and similar characteristics.

Abstract: A method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit provides improved resistance to code copying and reverse-engineering attacks. External interfaces that provide read access to the NV storage are be disabled, for a predetermined time after a reset or other initialization signal is received. An internal lock state bit or key is checked as well as an external lock prevent indication. If the lock prevent indication is not received, or the internal lock state bit is already set, then the integrated circuit is operated under a locked condition, in which external access to the NV storage values is prevented. The lock prevent indication may be a signal provided during reset of the integrated circuit on a terminal that is used for another purpose after initialization of the integrated circuit.

Abstract: Data pertaining to interactions between a plurality of customers is obtained. A graph is formed, having a plurality of nodes representing the customers and a plurality of edges representing interactions between the customers. A sub-set of the customers are denoted as previously churned customers. A spreading activation model is applied to the graph to identify, based on the graph and the previously churned customers, the potential churning customers.

Abstract: Data pertaining to interactions between a plurality of customers is obtained. A graph is formed, having a plurality of nodes representing the customers and a plurality of edges representing interactions between the customers. A sub-set of the customers are denoted as previously churned customers. A spreading activation model is applied to the graph to identify, based on the graph and the previously churned customers, the potential churning customers.

Abstract: A method of separating a chroma data component from a video data stream includes determining a phase relationship between a color burst in digital video data samples of a composite video signal and a local clock signal which processes the digital video data samples. In response to determining the phase relationship, interpolation filtering is performed on the digital video data samples corresponding to first and second display lines to generate phase aligned video data samples. Adaptive filtering is then performed utilizing the phase aligned video data samples corresponding to the first and second display lines to separate the chroma component from the digital video data samples corresponding to the first display line.

Abstract: A method and apparatus for reducing switching noise in a system-on-chip (SoC) integrated circuit including an analog to digital converter (ADC) provides for reduced noise in the ADC conversions. Sampling circuits of the ADC are operated by sampling clock signals and digital circuits and other noise-generating circuits such as power converters, are operated by digital circuit clock signals. Both sets of clock signals are derived from the same master clock by a clock generator circuit, but an offset is applied in the clock generator circuit to move the edges of the digital circuit clock signals away from critical sampling intervals corresponding to edges of the sampling clocks. In one embodiment, the offset is applied by a processor core that forms part of the digital circuits by setting a value in the clock generator, which the clock generator then loads into the divider after halting the clock to the digital circuits.

Abstract: A method and system for synchronizing video information derived from an asynchronously sampled video signals provide a mechanism for using asynchronous sampling in the front-end of digital video capture systems. A ratio between the sampling clock frequency and the source video clock frequency is computed via an all digital phase-lock loop (ADPLL) and either a video clock is generated from the ratio by another PLL, a number to clock converter or the ratio is used directly to provide digital synchronization information to downstream processing blocks. A sample rate converter (SRC) is provided in an interpolator that either acts as a sample position corrector at the same line rate as the received video, or by introducing an offset in the ADPLL, the video data can be converted to another line rate via the SRC.

Abstract: A method and system for video-synchronous audio clock generation from an asynchronously sampled video signal provides a mechanism for maintaining synchronization of audio sampling in digital video-audio systems. A ratio between the sampling clock frequency and an audio reference frequency clock is computed via an all digital phase-lock loop (ADPLL) and an audio clock is generated from the ratio by another PLL or a number to clock converter. In systems where a sampling clock to source video clock ratio has been computed for recovering a video signal, the audio ratio can be computed directly from the video ratio.

Abstract: A video quality adaptive variable-rate buffering method and system for stabilizing a sampled video signal reduces the buffer size required to compensate for line-to-line variations in an unstable video source. A video signal is sampled at a predetermined rate and decimated by a selectable decimation factor prior to buffering. By selecting different decimation factors, the effective length of the buffer is changed from short duration for stable input signals and to longer duration for unstable input signals. A video signal quality detector is employed to provide a selection input that adjusts the decimation factor and also the loop bandwidth of a clock generator that provides the output clock for the buffer, which is generated from the input signal via a phase-lock loop (PLL). The operation of the system automatically varies from highly responsive for stable video input signals to less responsive for unstable video input signals, providing improved stability in the video output.

Abstract: A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.

Abstract: A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.

Abstract: A video decoder in which the video source clock is generated entirely in the digital domain is disclosed herein. By creating a virtual version of the source clock in a numeric oscillator, the amount of noise in the system is substantially reduced. Furthermore, by transferring the digitized video signal, sampled with an asynchronous crystal clock, into the source clock domain, the accuracy of the brightness (amplitude) and color (phase) information can be greatly enhanced.

Abstract: A method of interfacing circuits operating in different voltage domains includes receiving a first signal with a first circuit operating in a first voltage domain and generating a second signal with a second circuit operating in a second voltage domain. The second signal is level shifted between the first and second voltage domains with a level shifter and synchronized with the first signal with a third circuit operating in the first voltage domain.

Abstract: Video decoder systems in which both the analog-to-digital converter and the composite decoder are driven by the stable sample clock, such as a crystal source. The outputs of the composite decoder are provided to a source rate converter, having an output that is provided to a digital output formatter. The digital output formatter is driven by the output clock, which may be locked to the source clock if desired. The output clock is developed by a clock generator which may be one of several different types, including a fractional N synthesizer, a direct digital synthesizer or a puncture clock.