Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.

Abstract: The present disclosure relates to methods and circuits to lowering the signal range of switching or logic circuits below supply range. The circuits may have one or more stages. The supply levels can be set individually for each stage. This may realize amplifiers/attenuators, both digitally and analogically controlled, based on progression and/or modulation in the supply range from stage to stage. A chain of stages can provide the desired power gain by setting the supply progression according to the nature of the incoming signals. The signal levels are lowered by generic device networks comprising voltage sources providing voltages independent of currents flowing through. Decoupling the signal amplitude from DC biasing allows for the signal swing to be lower than threshold voltages of the active devices.

Abstract: An electronic circuit is disclosed for dividing the frequency of a periodic signal, wherein at least one of the memory elements is arranged with its output terminal connected to the input terminal of another memory element wherein the electronic circuit is configured to generate an output signal having a smaller fundamental frequency than the clock signal at at least one of the output terminals. Each memory element is configured to change and hold a voltage at the output terminal based on a voltage at the input terminal at times controlled by a clock signal received at the clock terminal. At least two of the memory elements are stacked in the sense that the bottom terminal of a first memory element is connected to the top terminal of a second memory element to enable the charge to flow from the first memory element to the second memory element.

Abstract: An electronic circuit is disclosed for dividing the frequency of a periodic signal, wherein at least one of the memory elements is arranged with its output terminal connected to the input terminal of another memory element wherein the electronic circuit is configured to generate an output signal having a smaller fundamental frequency than the clock signal at at least one of the output terminals. Each memory element is configured to change and hold a voltage at the output terminal based on a voltage at the input terminal at times controlled by a clock signal received at the clock terminal. At least two of the memory elements are stacked in the sense that the bottom terminal of a first memory element is connected to the top terminal of a second memory element to enable the charge to flow from the first memory element to the second memory element.

Abstract: An electrically programmable load having an impedance value dependent on a received control word. The electrically programmable load has several parallel load units. Each load unit has one or more load unit element who receive a control word component of the control word and have a load unit element impedance value which depends on a control word component value of the control word component, where the control word component value is one of three or more different biasing values.

Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.

Abstract: The present disclosure discloses methods and circuits to reduce power consumption of switching circuits comprising two or more units by applying charge sharing/reuse of capacitive loads between the units. The units are stacked in a way that, if an output potential of a unit is to be lowered and an output potential of a neighboring unit is to be lifted, a charge of the unit to be lowered is reused by transferring it to the unit to be lifted depending on input signals of the units. In case of input signals having an arbitrary relationship a storage unit is placed at a junction of two neighboring units to store the charge temporarily until a neighboring unit is to be lifted.

Abstract: An electrically programmable load having an impedance value dependent on a received control word. The electrically programmable load has several parallel load units. Each load unit has one or more load unit element who receive a control word component of the control word and have a load unit element impedance value which depends on a control word component value of the control word component, where the control word component value is one of three or more different biasing values.

Abstract: The present disclosure discloses methods and circuits to reduce power consumption of switching circuits comprising two or more units by applying charge sharing/reuse of capacitive loads between the units. The units are stacked in a way that, if an output potential of a unit is to be lowered and an output potential of a neighboring unit is to be lifted, a charge of the unit to be lowered is reused by transferring it to the unit to be lifted depending on input signals of the units. In case of input signals having an arbitrary relationship a storage unit is placed at a junction of two neighboring units to store the charge temporarily until a neighboring unit is to be lifted.

Abstract: The present disclosure relates to methods and circuits to lowering the signal range of switching or logic circuits below supply range. The circuits may have one or more stages. The supply levels can be set individually for each stage. This may realize amplifiers/attenuators, both digitally and analogically controlled, based on progression and/or modulation in the supply range from stage to stage. A chain of stages can provide the desired power gain by setting the supply progression according to the nature of the incoming signals. The signal levels are lowered by generic device networks comprising voltage sources providing voltages independent of currents flowing through. Decoupling the signal amplitude from DC biasing allows for the signal swing to be lower than threshold voltages of the active devices.