Patents by Inventor Raimund Peichl

Raimund Peichl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312226
    Abstract: A semiconductor device includes a chip, a contact pad arranged over the front side of the chip and an identification mark arranged over the contact pad. The identification mark includes an information about a property of the chip.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: April 12, 2016
    Assignee: Infineon Technologies AG
    Inventors: Stefan Martens, Berthold Schuderer, Mathias Vaupel, Raimund Peichl
  • Publication number: 20150087131
    Abstract: A method for processing a chip is provided. The method may include: providing a chip having a front side and a back side; and forming an orientation marker on the back side of the chip by forming a hole into the chip from the front side of the chip, the hole forming the orientation marker.
    Type: Application
    Filed: September 20, 2013
    Publication date: March 26, 2015
    Applicant: Infineon Technologies AG
    Inventors: Stefan Martens, Raimund Peichl
  • Publication number: 20140308793
    Abstract: An electrical device includes a semiconductor material. The semiconductor material includes a first region of the semiconductor material having a first conductivity type, a second region of the semiconductor material having a second conductivity type complementary to the first conductivity type and an intermediate region of the semiconductor material between the first region and the second region. The first and second regions lie next to each other the intermediate region so as to form a diode structure. A shape of the intermediate region tapers from the first region to the second region.
    Type: Application
    Filed: June 27, 2014
    Publication date: October 16, 2014
    Inventors: Josef Dietl, Raimund Peichl, Gabriele Bettineschi
  • Publication number: 20140167272
    Abstract: A semiconductor device includes a chip, a contact pad arranged over the front side of the chip and an identification mark arranged over the contact pad. The identification mark includes an information about a property of the chip.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Stefan Martens, Berthold Schuderer, Mathias Vaupel, Raimund Peichl
  • Publication number: 20140124893
    Abstract: An electrical device includes a semiconductor material. The semiconductor material includes a first region of the semiconductor material having a first conductivity type, a second region of the semiconductor material having a second conductivity type complementary to the first conductivity type and an intermediate region of the semiconductor material between the first region and the second region. The first and second regions lie next to each other the intermediate region so as to form a diode structure. A shape of the intermediate region tapers from the first region to the second region.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Josef Dietl, Raimund Peichl, Gabriele Bettineschi
  • Patent number: 7307329
    Abstract: An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: December 11, 2007
    Assignee: Infineon Technologies AG
    Inventors: Cartens Ahrens, Ulf Bartl, Bernd Eisener, Wolfgang Hartung, Christian Herzum, Raimund Peichl, Stefan Pompl, Hubert Werthmann
  • Patent number: 6972469
    Abstract: A PIN diode includes a first p-area, an n-area, and in between an intermediate area on a first surface of a substrate, wherein a doping concentration of the intermediate area is lower than a doping concentration of the p-area and lower than a doping concentration of the n-area. Further, the PIN diode includes a first electrically conductive member, which is arranged on a side of the p-area, which faces away from the intermediate area, and a second electrically conductive member, which is arranged on a side of the n-area, which faces away from the intermediate area. The PIN diode is preferably separated from the substrate by an insulating layer, covered by a further insulating layer on the surface, which faces away from the substrate, and laterally surrounded by a trench filled with an insulating material, such that it is essentially fully insulated and encapsulated.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: December 6, 2005
    Assignee: Infineon Technologies AG
    Inventors: Raimund Peichl, Philipp Seng
  • Patent number: 6888430
    Abstract: An integrated component for radiofrequency applications has a resonant circuit with tuning diodes and trimming diodes that are connected in parallel. A programmable conductor network generates a trimming voltage at a trimming input that enables the production of a specific relationship between a voltage present at a tuning input and the resonant frequency of the resonant circuit.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: May 3, 2005
    Assignee: Infineon Technologies AG
    Inventors: Reinhard Losehand, Raimund Peichl, Walter Zimmermann
  • Patent number: 6798042
    Abstract: The invention is a diode having at least one trench in the semiconductor substrate and insulation configured on the surface of the semiconductor substrate so that the trench limits the depletion region of the diode and the area over which an electrode is in direct contact with the diffusion region of the diode is limited by the insulation. The diode has the advantage that the extent of the depletion region, and thus the area capacitance of the diode, and the size of the electrode are decoupled from one another. The lateral extent of the depletion region can be chosen independently of the size of the electrode.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: September 28, 2004
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Raimund Peichl, Reinhard Gabl
  • Publication number: 20040119130
    Abstract: A PIN diode includes a first p-area, an n-area, and in between an intermediate area on a first surface of a substrate, wherein a doping concentration of the intermediate area is lower than a doping concentration of the p-area and lower than a doping concentration of the n-area. Further, the PIN diode includes a first electrically conductive member, which is arranged on a side of the p-area, which faces away from the intermediate area, and a second electrically conductive member, which is arranged on a side of the n-area, which faces away from the intermediate area. The PIN diode is preferably separated from the substrate by an insulating layer, covered by a further insulating layer on the surface, which faces away from the substrate, and laterally surrounded by a trench filled with an insulating material, such that it is essentially fully insulated and encapsulated.
    Type: Application
    Filed: December 8, 2003
    Publication date: June 24, 2004
    Inventors: Raimund Peichl, Philipp Seng
  • Publication number: 20030090347
    Abstract: An integrated component for radiofrequency applications has a resonant circuit with tuning diodes and trimming diodes that are connected in parallel. A programmable conductor network generates a trimming voltage at a trimming input that enables the production of a specific relationship between a voltage present at a tuning input and the resonant frequency of the resonant circuit.
    Type: Application
    Filed: October 7, 2002
    Publication date: May 15, 2003
    Inventors: Reinhard Losehand, Raimund Peichl, Walter Zimmermann
  • Publication number: 20030062581
    Abstract: The invention is a diode having at least one trench in the semiconductor substrate and insulation configured on the surface of the semiconductor substrate so that the trench limits the depletion region of the diode and the area over which an electrode is in direct contact with the diffusion region of the diode is limited by the insulation. The diode has the advantage that the extent of the depletion region, and thus the area capacitance of the diode, and the size of the electrode are decoupled from one another. The lateral extent of the depletion region can be chosen independently of the size of the electrode.
    Type: Application
    Filed: October 15, 2002
    Publication date: April 3, 2003
    Inventors: Carsten Ahrens, Raimund Peichl, Reinhard Gabl