Patents by Inventor RAINER ERNST GEHRES

RAINER ERNST GEHRES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020053700
    Abstract: Methods for fabricating a semiconductor structure is provided wherein the diffusion region includes at least two regions of different depth, the deepest of which is aligned to the trench isolation region of the structure. Semiconductor structures such as FETs, resistors, bipolar transistors, capacitors and diodes comprising a semiconductor substrate having a surface; an external device region on the surface of said semiconductor substrate; a channel region of a first dopant type in said semiconductor substrate under said FET; and a doped region of a second dopant type in said substrate, said doped region comprising a first portion abutting said channel region, of a first depth, and a second portion abutting said first portion, of a second depth which is deeper than the depth of the first portion is also provided.
    Type: Application
    Filed: July 29, 1999
    Publication date: May 9, 2002
    Inventors: ARNE WATSON BALLANTINE, RAINER ERNST GEHRES, TERENCE BLACKWELL HOOK, PETER SMEYS