Abstract: The present disclosure relates to a module for an Ethernet node of a group, the module including media access control (MAC), physical coding sublayer (PCS), and priority manager (PM) interfaces. The module is configured to receive or transmit sequences of a cycle over the interfaces. The cycle includes a start sequence, a series of priority sequences, an announcement sequence, and a data sequence. The start sequence includes a predefined start and advertisement symbols. Each priority sequence includes a predefined commit symbol and a dedicated priority symbol assigned to the respective priority sequence and indicating a priority of an Ethernet frame ready to be sent. The announcement sequence includes the start symbol, a predefined commit symbol and a winner node symbol indicating one of the Ethernet nodes being ready to send the Ethernet frame having the highest priority. The data sequence includes the Ethernet frame having the highest priority.

Abstract: An interference suppression module for an Ethernet transceiver, the interference suppression module comprising circuitry configured to: receive a receiver output from a receiver module of the Ethernet transceiver, the receiver module configured to output a logic-high when a received voltage signal is higher than a receiver threshold, and output a logic-low when the received voltage signal is lower than the receiver threshold; receive an energy detection output from an energy detection module of the Ethernet transceiver, the energy detection module configured to output a logic-high when the received voltage signal is higher than a positive energy detection threshold or lower than a negative energy detection threshold, and output a logic-low when the received voltage signal is between the positive and negative energy detection thresholds; and output a predefined logic state to a receive pin of the Ethernet transceiver when the energy detection output is a logic-low.

Abstract: A method of operating a plurality of communications nodes in a 10BASE-T1S Ethernet network. The plurality of communications nodes are configured to implement a physical layer collision avoidance, PLCA, process. At least two of the communications nodes are candidate beacon generators. The method comprises: for each of the at least two candidate beacon generators, determining a time delay since a last received beacon, comparing the determined time delay with a threshold value associated with the candidate beacon generator, and if the time delay exceeds the threshold value then setting that candidate beacon generator as an in-use beacon generator; and the in-use beacon generator transmitting a beacon to define the start of a PLCA cycle, thereby triggering a transmit opportunity for each of the other communication nodes.

Abstract: An interference suppression module for an Ethernet transceiver, the interference suppression module comprising circuitry configured to: receive a receiver output from a receiver module of the Ethernet transceiver, the receiver module configured to output a logic-high when a received voltage signal is higher than a receiver threshold, and output a logic-low when the received voltage signal is lower than the receiver threshold; receive an energy detection output from an energy detection module of the Ethernet transceiver, the energy detection module configured to output a logic-high when the received voltage signal is higher than a positive energy detection threshold or lower than a negative energy detection threshold, and output a logic-low when the received voltage signal is between the positive and negative energy detection thresholds; and output a predefined logic state to a receive pin of the Ethernet transceiver when the energy detection output is a logic-low.

Abstract: A transceiver has a first interface supplied by a first supply voltage to interface with external devices operating in a first supply domain and a second interface supplied by a second supply voltage and adapted to interface to an external communication bus operating in a second supply domain. The transceiver has a first internal communication link, which is adapted to transfer transmit data generated by an external device operating in the first supply domain, from the first interface to the second interface, and a second internal communication link, which is adapted to transfer transmit data be supplied from the external communication bus operating in the second supply domain from the second interface to the first interface.

Abstract: A proxy slave in a first LIN partition receives data from a proxy master in the second LIN partition which in turn receives the data from a slave in the second LIN partition. The proxy slave stores the data in a data structure and receives a read request from an originating master in the first LIN partition after the data is stored. The read request comprises a LIN message identifier subscribed to by the slave in the second LIN partition. The proxy slave accesses the data stored in the data structure based on the LIN message identifier in the read request; and sends a LIN response to the originating master with the stored data from the slave in the second LIN partition.

Abstract: A proxy slave in a first LIN partition receives data from a proxy master in the second LIN partition which in turn receives the data from a slave in the second LIN partition. The proxy slave stores the data in a data structure and receives a read request from an originating master in the first LIN partition after the data is stored. The read request comprises a LIN message identifier subscribed to by the slave in the second LIN partition. The proxy slave accesses the data stored in the data structure based on the LIN message identifier in the read request; and sends a LIN response to the originating master with the stored data from the slave in the second LIN partition.

Abstract: Disclosed are a transceiver device (100) and a method for interfacing between at least two different voltage domains (12, 14), namely a first supply voltage domain (12) having a higher first supply voltage and a second supply voltage domain (14) having a lower second supply voltage.

Abstract: A system for assigning addresses to a plurality of communication nodes coupled via a power line is disclosed. Each of the plurality of communication nodes includes a current sensor. The plurality of communication nodes includes one master communication node and the master communication node is configured to start an auto-addressing process by asking the each of the plurality of communication nodes to sink a preselect amount of current and measure current, through the current sensor, flowing through the powerline under the each of the plurality of communication nodes. A first communication node in the plurality of communication nodes that does not measure any current flowing under the first communication node is assigned a first address.

Abstract: A system for assigning addresses to a plurality of communication nodes coupled via a power line is disclosed. Each of the plurality of communication nodes includes a current sensor. The plurality of communication nodes includes one master communication node and the master communication node is configured to start an auto-addressing process by asking the each of the plurality of communication nodes to sink a preselect amount of current and measure current, through the current sensor, flowing through the powerline under the each of the plurality of communication nodes. A first communication node in the plurality of communication nodes that does not measure any current flowing under the first communication node is assigned a first address.

Abstract: Aspects of the present disclosure are directed to single-wire bus communications. In accordance with one or more embodiments, a pull-up current is delimited when a single-wire bus circuit is operated at a dominant level during the transmission of data on the single-wire bus circuit. This approach can be implemented to facilitate power savings, such as in applications involving a master control circuit that transmits signals by driving the single-wire bus circuit between dominant and recessive levels.

Abstract: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).

Abstract: Aspects of the present disclosure are directed to single-wire bus communications. In accordance with one or more embodiments, a pull-up current is delimited when a single-wire bus circuit is operated at a dominant level during the transmission of data on the single-wire bus circuit. This approach can be implemented to facilitate power savings, such as in applications involving a master control circuit that transmits signals by driving the single-wire bus circuit between dominant and recessive levels.

Abstract: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).