Patents by Inventor Rainer Evers

Rainer Evers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250119313
    Abstract: A method of operating a plurality of communications nodes in a 10BASE-T1S Ethernet network. The plurality of communications nodes are configured to implement a physical layer collision avoidance, PLCA, process. At least two of the communications nodes are candidate beacon generators. The method comprises: for each of the at least two candidate beacon generators, determining a time delay since a last received beacon, comparing the determined time delay with a threshold value associated with the candidate beacon generator, and if the time delay exceeds the threshold value then setting that candidate beacon generator as an in-use beacon generator; and the in-use beacon generator transmitting a beacon to define the start of a PLCA cycle, thereby triggering a transmit opportunity for each of the other communication nodes.
    Type: Application
    Filed: August 29, 2024
    Publication date: April 10, 2025
    Inventors: Lu Lu Chan, Hubertus Gerardus Hendrikus Vermeulen, Donald Robert Pannell, Rainer Evers
  • Publication number: 20230155694
    Abstract: An interference suppression module for an Ethernet transceiver, the interference suppression module comprising circuitry configured to: receive a receiver output from a receiver module of the Ethernet transceiver, the receiver module configured to output a logic-high when a received voltage signal is higher than a receiver threshold, and output a logic-low when the received voltage signal is lower than the receiver threshold; receive an energy detection output from an energy detection module of the Ethernet transceiver, the energy detection module configured to output a logic-high when the received voltage signal is higher than a positive energy detection threshold or lower than a negative energy detection threshold, and output a logic-low when the received voltage signal is between the positive and negative energy detection thresholds; and output a predefined logic state to a receive pin of the Ethernet transceiver when the energy detection output is a logic-low.
    Type: Application
    Filed: November 3, 2022
    Publication date: May 18, 2023
    Inventor: Rainer Evers
  • Patent number: 11516043
    Abstract: A transceiver has a first interface supplied by a first supply voltage to interface with external devices operating in a first supply domain and a second interface supplied by a second supply voltage and adapted to interface to an external communication bus operating in a second supply domain. The transceiver has a first internal communication link, which is adapted to transfer transmit data generated by an external device operating in the first supply domain, from the first interface to the second interface, and a second internal communication link, which is adapted to transfer transmit data be supplied from the external communication bus operating in the second supply domain from the second interface to the first interface.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: November 29, 2022
    Assignee: NXP B.V.
    Inventors: Rainer Evers, Gerald Kwakernaat, Matthias Berthold Muth
  • Patent number: 11463555
    Abstract: A proxy slave in a first LIN partition receives data from a proxy master in the second LIN partition which in turn receives the data from a slave in the second LIN partition. The proxy slave stores the data in a data structure and receives a read request from an originating master in the first LIN partition after the data is stored. The read request comprises a LIN message identifier subscribed to by the slave in the second LIN partition. The proxy slave accesses the data stored in the data structure based on the LIN message identifier in the read request; and sends a LIN response to the originating master with the stored data from the slave in the second LIN partition.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: October 4, 2022
    Assignee: NXP B.V.
    Inventors: Rainer Evers, Donald Robert Pannell
  • Publication number: 20220046108
    Abstract: A proxy slave in a first LIN partition receives data from a proxy master in the second LIN partition which in turn receives the data from a slave in the second LIN partition. The proxy slave stores the data in a data structure and receives a read request from an originating master in the first LIN partition after the data is stored. The read request comprises a LIN message identifier subscribed to by the slave in the second LIN partition. The proxy slave accesses the data stored in the data structure based on the LIN message identifier in the read request; and sends a LIN response to the originating master with the stored data from the slave in the second LIN partition.
    Type: Application
    Filed: August 4, 2020
    Publication date: February 10, 2022
    Inventors: Rainer Evers, Donald Robert Pannell
  • Publication number: 20210250199
    Abstract: Disclosed are a transceiver device (100) and a method for interfacing between at least two different voltage domains (12, 14), namely a first supply voltage domain (12) having a higher first supply voltage and a second supply voltage domain (14) having a lower second supply voltage.
    Type: Application
    Filed: February 2, 2021
    Publication date: August 12, 2021
    Inventors: Rainer Evers, Gerald Kwakernaat, Matthias Berthold Muth
  • Patent number: 10013379
    Abstract: A system for assigning addresses to a plurality of communication nodes coupled via a power line is disclosed. Each of the plurality of communication nodes includes a current sensor. The plurality of communication nodes includes one master communication node and the master communication node is configured to start an auto-addressing process by asking the each of the plurality of communication nodes to sink a preselect amount of current and measure current, through the current sensor, flowing through the powerline under the each of the plurality of communication nodes. A first communication node in the plurality of communication nodes that does not measure any current flowing under the first communication node is assigned a first address.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 3, 2018
    Assignee: NXP B.V.
    Inventors: Bernd Uwe Gerhard Elend, Rainer Evers
  • Publication number: 20170242816
    Abstract: A system for assigning addresses to a plurality of communication nodes coupled via a power line is disclosed. Each of the plurality of communication nodes includes a current sensor. The plurality of communication nodes includes one master communication node and the master communication node is configured to start an auto-addressing process by asking the each of the plurality of communication nodes to sink a preselect amount of current and measure current, through the current sensor, flowing through the powerline under the each of the plurality of communication nodes. A first communication node in the plurality of communication nodes that does not measure any current flowing under the first communication node is assigned a first address.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 24, 2017
    Inventors: Bernd Uwe Gerhard Elend, Rainer Evers
  • Patent number: 9454500
    Abstract: Aspects of the present disclosure are directed to single-wire bus communications. In accordance with one or more embodiments, a pull-up current is delimited when a single-wire bus circuit is operated at a dominant level during the transmission of data on the single-wire bus circuit. This approach can be implemented to facilitate power savings, such as in applications involving a master control circuit that transmits signals by driving the single-wire bus circuit between dominant and recessive levels.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: September 27, 2016
    Assignee: NXP B.V.
    Inventors: Rainer Evers, Martin Wagner
  • Patent number: 8935450
    Abstract: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: January 13, 2015
    Assignee: NXP B.V.
    Inventors: Pieter Gustaaf Nierop, Clemens Gerhardus Johannes de Haas, Rainer Evers, Franciscus Johannes Klosters
  • Publication number: 20140372647
    Abstract: Aspects of the present disclosure are directed to single-wire bus communications. In accordance with one or more embodiments, a pull-up current is delimited when a single-wire bus circuit is operated at a dominant level during the transmission of data on the single-wire bus circuit. This approach can be implemented to facilitate power savings, such as in applications involving a master control circuit that transmits signals by driving the single-wire bus circuit between dominant and recessive levels.
    Type: Application
    Filed: June 17, 2013
    Publication date: December 18, 2014
    Inventors: Rainer Evers, Martin Wagner
  • Publication number: 20130073761
    Abstract: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).
    Type: Application
    Filed: September 16, 2011
    Publication date: March 21, 2013
    Inventors: Peter Gustaaf Nierop, Clemens Gerhardus Johannes de Haas, Rainer Evers, Franciscus Johannes Klosters