Patents by Inventor Rainer Hohler

Rainer Hohler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6779124
    Abstract: The circuit has a clock input for supplying a first clock signal and a clock generator for generating a second clock signal, said clock generator being phase-locked with respect to the first clock signal. The clock output of the clock generator is connected to a control input of a data transmission unit used for outputting data from the circuit and/or for reading into the circuit essentially in synchronism with the first clock signal. The clock generator has at least two control loops connected in succession which are used for controlling the phase angle of the second clock signal, the first control loop being used to generate from the first clock signal at least two intermediate clock signals, each of which has a particular phase angle with respect to the first clock signal, and the second control loop being used to generate the second clock signal from the intermediate clock signals.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: August 17, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Höhler, Gunnar Krause
  • Patent number: 6639958
    Abstract: The invention relates to a circuit configuration for the interference-free initialization of delay locked loop circuits with fast lock. A control signal for rapidly adjusting the DLL circuit is converted into a delayed control signal, which is kept constant with the rising edge of a counter clock signal. This prevents instabilities of the counter value from occurring.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: October 28, 2003
    Assignee: Infineon Technologies AG
    Inventors: Rainer Höhler, Mathias Von Borcke
  • Publication number: 20010025350
    Abstract: The circuit has a clock input for supplying a first clock signal and a clock generator for generating a second clock signal, said clock generator being phase-locked with respect to the first clock signal. The clock output of the clock generator is connected to a control input of a data transmission unit used for outputting data from the circuit and/or for reading into the circuit essentially in synchronism with the first clock signal. The clock generator has at least two control loops connected in succession which are used for controlling the phase angle of the second clock signal, the first control loop being used to generate from the first clock signal at least two intermediate clock signals, each of which has a particular phase angle with respect to the first clock signal, and the second control loop being used to generate the second clock signal from the intermediate clock signals.
    Type: Application
    Filed: March 19, 2001
    Publication date: September 27, 2001
    Inventors: Rainer Hohler, Gunnar Krause