Patents by Inventor Rainer Kress

Rainer Kress has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7206829
    Abstract: A method for operating a network computer wherein the network computer has reconfigurable hardware that can be connected to a network. The hardware includes one FPGA, a plurality of FPGAs, or a plurality of FPGAs with processors and memory. Advantageously, the computer is dynamically structurable via the network.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: April 17, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Klaus Buchenrieder, Rainer Kress, Alexander Sedlmeier
  • Patent number: 6717436
    Abstract: The invention relates to an FPGA (field programmable gate array) with a plurality of functional blocks. An interface enables data and address communication between a processor and the FPGA. The gate array is provided with configurations from a configuration memory. The FPGA also includes a buffer memory for selectively storing configurations from the configuration memory and for the direct selective access, from the FPGA, to any configuration stored in the buffer memory.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: April 6, 2004
    Assignee: Infineon Technologies AG
    Inventors: Rainer Kress, Klaus Buchenrieder
  • Publication number: 20020125911
    Abstract: The invention relates to an FPGA (field programmable gate array) with a plurality of functional blocks. An interface enables data and address communication between a processor and the FPGA. The gate array is provided with configurations from a configuration memory. The FPGA also includes a buffer memory for selectively storing configurations from the configuration memory and for the direct selective access, from the FPGA, to any configuration stored in the buffer memory.
    Type: Application
    Filed: March 28, 2002
    Publication date: September 12, 2002
    Inventors: Rainer Kress, Klaus Buchenrieder
  • Patent number: 6418399
    Abstract: At least two algorithms are assigned to at least one defined algorithm. Each of these two algorithms has a different probability of being the next algorithm to be executed during and/or after execution of the defined algorithm. Of the two assigned algorithms, the one which is in fact executed next is the one with the greater probability of execution.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: July 9, 2002
    Assignee: Infineon Technologies AG
    Inventors: Klaus Buchenrieder, Rainer Kress
  • Publication number: 20020015407
    Abstract: The invention relates to a method for transmitting information by means of data packets, the data packets being forwarded from a transmitter via routers to a receiver and a header of the data packet containing information for the forwarding of the data packet.
    Type: Application
    Filed: April 3, 2001
    Publication date: February 7, 2002
    Applicant: Infineon Technologies, AG
    Inventors: Chris Huebsch, Ronald Schmidt, Rainer Kress
  • Publication number: 20010047249
    Abstract: At least two algorithms are assigned to at least one defined algorithm. Each of these two algorithms has a different probability of being the next algorithm to be executed during and/or after execution of the defined algorithm. Of the two assigned algorithms, the one which is in fact executed next is the one with the greater probability of execution.
    Type: Application
    Filed: March 30, 2001
    Publication date: November 29, 2001
    Inventors: Klaus Buchenrieder, Rainer Kress