Abstract: We disclose an Infrared (IR) device comprising a first substrate comprising a first cavity; a dielectric layer disposed on the first substrate; a second substrate disposed on the dielectric layer and on the opposite side of the first substrate, the second substrate having a second cavity. The device further comprises an optically transmissive layer attached to one of the first and second substrates; a further layer provided to another of the first and second substrates so that the IR device is substantially closed. Holes are provided through the dielectric layer so that a pressure in the first cavity is substantially the same level as a pressure in the second cavity.

Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.

Abstract: We disclose an Infrared (IR) device comprising a first substrate comprising a first cavity; a dielectric layer disposed on the first substrate; a second substrate disposed on the dielectric layer and on the opposite side of the first substrate, the second substrate having a second cavity. The device further comprises an optically transmissive layer attached to one of the first and second substrates; a further layer provided to another of the first and second substrates so that the IR device is substantially closed. Holes are provided through the dielectric layer so that a pressure in the first cavity is substantially the same level as a pressure in the second cavity.

Abstract: An optical sensor arrangement for time-of-flight comprises a first and a second cavity separated by an optical barrier and covered by a cover arrangement. An optical emitter is arranged in the first cavity, a measurement and a reference photodetector are arranged in the second cavity. The cover arrangement comprises a plate and layers of material arranged on an inner main surface thereof. The layers comprise an opaque coating with a first and second aperture above the first cavity, and with a third and fourth aperture above the second cavity. The measurement photodetector is configured to detect light entering the second cavity through the fourth aperture. The second and the third aperture establish a reference path for light from the emitter to the reference photodetector.

Abstract: The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material.

Abstract: The semiconductor device comprises a semiconductor substrate (1), a photosensor (2) integrated in the substrate (1) at a main surface (10), an emitter (12) of radiation mounted above the main surface (10), and a cover (6), which is at least partially transmissive for the radiation, arranged above the main surface (10). The cover (6) comprises a cavity (7), and the emitter (12) is arranged in the cavity (7). A radiation barrier (9) can be provided on a lateral surface of the cavity (7) to inhibit cross-talk between the emitter (12) and the photosensor (2).

Abstract: The method comprises the steps of providing a semiconductor device comprising a semiconductor layer (1) with at least one radiation sensor (6) and a dielectric layer (2), arranging a web (3) comprising a plurality of recesses (4) on the dielectric layer, and introducing ink of different colors (A, B, C) in the recesses by inkjets (I).

Abstract: The semiconductor device comprises a semiconductor substrate (1), a photosensor (2) integrated in the substrate (1) at a main surface (10), an emitter (12) of radiation mounted above the main surface (10), and a cover (6), which is at least partially transmissive for the radiation, arranged above the main surface (10). The cover (6) comprises a cavity (7), and the emitter (12) is arranged in the cavity (7). A radiation barrier (9) can be provided on a lateral surface of the cavity (7) to inhibit cross-talk between the emitter (12) and the photosensor (2).

Abstract: The semiconductor device comprises a semiconductor substrate (2), a transition layer (5) in or on the semiconductor substrate, the transition layer allowing propagation of incident radiation (7) according to a refractive index, and a photonic component (4) facing the transition layer. A surface (6) of the transition layer is structured such that the effective refractive index is gradually changed through the transition layer with changing distance from the photonic component.

Abstract: The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material.

Abstract: The integrated imaging device comprises a substrate (1) with an integrated circuit (4), a cover (2), a cavity (6) enclosed between the substrate (1) and the cover (2), and a sensor (5) or an array of sensors (5) arranged in the cavity (6). A surface (11, 12) of the substrate (1) or the cover (2) opposite the cavity (6) has a structure (8) directing incident radiation. The surface structure (8) may be a plate zone or a Fresnel lens focusing infrared radiation and may be etched into the surface of the substrate or cover, respectively.

Abstract: A cutout (11), which penetrates the semiconductor body, is present in the semiconductor body (1). A conductor layer (6), which is electrically conductively connected to a metal plane (3) on or over the semiconductor body, screens the semiconductor body electrically from the cutout. The conductor layer can be metal, optionally with a barrier layer (6a), or a doped region of the semiconductor body.

Abstract: The integrated imaging device comprises a substrate (1) with an integrated circuit (4), a cover (2), a cavity (6) enclosed between the substrate (1) and the cover (2), and a sensor (5) or an array of sensors (5) arranged in the cavity (6). A surface (11, 12) of the substrate (1) or the cover (2) opposite the cavity (6) has a structure (8) directing incident radiation. The surface structure (8) may be a plate zone or a Fresnel lens focusing infrared radiation and may be etched into the surface of the substrate or cover, respectively.

Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.

Abstract: The method comprises the steps of providing a semiconductor device comprising a semiconductor layer (1) with at least one radiation sensor (6) and a dielectric layer (2), arranging a web (3) comprising a plurality of recesses (4) on the dielectric layer, and introducing ink of different colors (A, B, C) in the recesses by inkjets (I).

Abstract: The photodiode has a p-type doped region (2) and an n-type doped region (3) in a semiconductor body (1), and a pn junction (4) between the p-type doped region and the n-type doped region. The semiconductor body has a cavity (5) such that the pn junction (4) has a distance (d) of at most 30 ?m from the bottom of the cavity (7).

Abstract: A semiconductor body (10) comprises a field-effect transistor (11). The field-effect transistor (11) comprises a drain region (12) of a first conduction type, a source region (13) of the first conduction type, a drift region (16) and a channel region (14) of a second conduction type which is opposite to the first conduction type. The drift region (16) comprises at least two stripes (15, 32) of the first conduction type which extend from the drain region (12) in a direction towards the source region (13). The channel region (14) is arranged between the drift region (16) and the source region (13).

Abstract: The photodiode has a p-type doped region (2) and an n-type doped region (3) in a semiconductor body (1), and a pn junction (4) between the p-type doped region and the n-type doped region. The semiconductor body has a cavity (5) such that the pn junction (4) has a distance (d) of at most 30 ?m from the bottom of the cavity (7).

Abstract: A cutout (11), which penetrates the semiconductor body, is present in the semiconductor body (1). A conductor layer (6), which is electrically conductively connected to a metal plane (3) on or over the semiconductor body, screens the semiconductor body electrically from the cutout. The conductor layer can be metal, optionally with a barrier layer (6a), or a doped region of the semiconductor body.

Abstract: A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arranged within the chip design (1).