Abstract: A method and circuit for identifying hidden faults in the internal circuit parts of integrated CML-logic-circuits include reducing the voltage difference between the high and low binary signals (logic swing) during testing so that the noise immunity is diminished. The logic swing is reduced by varying reference voltages for constant current sources and differential amplifiers through the use of an integrated control circuit connected to influence reference voltage generators. The control circuit is activated by reducing the supply voltage in a first embodiment or, in a second embodiment, by an external control signal.

Abstract: In order to enable the control of plurality of receivers in CML technology comprising two or three levels of series gating by way of a transmitter whose maximum fanout is smaller than the total number of receivers, the emitter followers provided for level shifting of the control signal for a differential amplifier of the second or third series-gated switch level in each receiver are omitted and are replaced by a common emitter follower having increased performance capability for a respective group of n2 receivers. The invention finds application in 2-bit multiplexers and register stages.