Abstract: Exemplary embodiments disclosed herein relate to a radar device. The radar device may transmit an RF oscillator signal to a radar channel and receive a respective first RF radar signal from the radar channel. The radar device may further generate a second RF radar signal. Frequency conversion circuits are also disclosed to down-convert the first RF radar signal and the second RF radar signal. An analog-to digital conversion unit may digitize the down-converted first RF radar signal and the down-converted second RF radar signal to generate a first digital signal and a second digital signal, respectively. A digital signal processing unit is disclosed to estimate a phase noise signal included in the second digital signal and to generate a cancellation signal based on the estimated phase noise signal. The cancellation signal is subtracted from the first digital radar signal to obtain a noise compensated digital radar signal.

Abstract: A method is described that, according to one exemplary embodiment, involves the following: generating a first radio frequency (RF) signal by a first RF oscillator and a second RF signal by a second RF oscillator, mixing the first RF signal and the second RF signal by a mixer to generate a mixer output signal, digitizing the mixer output signal to generate a digitized signal, and calculating an estimate for a power spectral density of the mixer output signal from the digitized signal. Based on the estimate for the power spectral density of the mixer output signal, an estimate for a noise power spectral density characterizing the noise contained in the first and the second RF signals is calculated.

Abstract: A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.

Abstract: A circuit includes an RF oscillator coupled in a phase-locked loop. The phase-locked loop is configured to receive a digital input signal, which is a sequence of digital words, and to generate a feedback signal for the RF oscillator based on the digital input signal. The circuit further includes a digital-to-analog conversion unit that includes a pre-processing stage configured to pre-process the sequence of digital words and a digital-to-analog-converter configured to convert the pre-processed sequence of digital words into the analog output signal. The circuit includes circuitry configured to combine the analog output signal and the feedback signal to generate a control signal for the RF oscillator. The pre-processing stage includes a word-length adaption unit configured to reduce the word-lengths of the digital words and a sigma-delta modulator coupled to the word-length adaption unit downstream thereof and configured to modulate the sequence of digital words having reduced word-lengths.

Abstract: A radar sensor includes a mixer configured to receive an radio frequency (RF) input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The radar sensor further includes an oscillator circuit that is configured to generate a test signal. The ADC is coupled to an output of the signal processing chain, and is configured to generate a digital signal by digitizing an output signal of the signal processing chain, the output signal being derived from the test signal. The radar sensor further includes a digital signal processing circuit coupled to the ADC downstream thereof, the digital signal processing circuit being configured to perform a spectral analysis on frequency values of the digital signal.

Abstract: A method for processing radar data is described herein. In accordance with one embodiment, the method includes the calculation of a Range Map based on a digital radar signal received from a radar receiver. The Range Map includes spectral values for a plurality of discrete frequency values and a plurality of discrete time values, wherein each spectral value is represented by at least a first parameter. Further, the method includes applying an operation to at least the first parameters in the Range Map for at least one discrete frequency value to smooth or analyze at least a portion of the Range Map.

Abstract: One exemplary embodiment of the present invention relates to a circuit that includes at least one RF signal path for an RF signal and at least one power sensor, which is coupled to the RF signal path and configured to generate a sensor signal representing the power of the RF signal during normal operation of the circuit. The circuit further includes a circuit node for receiving an RF test signal during calibration operation of the circuit. The circuit node is coupled to the at least one power sensor, so that the at least one power sensor receives the RF test signal additionally or alternatively to the RF signal and generates the sensor signal as representing the power of the RF test signal.

Abstract: A radar sensor includes a mixer configured to receive an radio frequency (RF) input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The radar sensor further includes an oscillator circuit that is configured to generate a test signal. The ADC is coupled to an output of the signal processing chain, and is configured to generate a digital signal by digitizing an output signal of the signal processing chain, the output signal being derived from the test signal. The radar sensor further includes a digital signal processing circuit coupled to the ADC downstream thereof, the digital signal processing circuit being configured to perform a spectral analysis on frequency values of the digital signal.

Abstract: One exemplary embodiment of the present invention relates to a circuit that includes at least one RF signal path for an RF signal and at least one power sensor, which is coupled to the RF signal path and configured to generate a sensor signal representing the power of the RF signal during normal operation of the circuit. The circuit further includes a circuit node for receiving an RF test signal during calibration operation of the circuit. The circuit node is coupled to the at least one power sensor, so that the at least one power sensor receives the RF test signal additionally or alternatively to the RF signal and generates the sensor signal as representing the power of the RF test signal.

Abstract: A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.

Abstract: A circuit includes an RF oscillator coupled in a phase-locked loop. The phase-locked loop is configured to receive a digital input signal, which is a sequence of digital words, and to generate a feedback signal for the RF oscillator based on the digital input signal. The circuit further includes a digital-to-analog conversion unit that includes a pre-processing stage configured to pre-process the sequence of digital words and a digital-to-analog-converter configured to convert the pre-processed sequence of digital words into the analog output signal. The circuit includes circuitry configured to combine the analog output signal and the feedback signal to generate a control signal for the RF oscillator. The pre-processing stage includes a word-length adaption unit configured to reduce the word-lengths of the digital words and a sigma-delta modulator coupled to the word-length adaption unit downstream thereof and configured to modulate the sequence of digital words having reduced word-lengths.

Abstract: A method for cancelling phase noise in a radar signal is described herein. In accordance with one embodiment, the method includes transmitting an RF oscillator signal, which represents a local oscillator signal including phase noise, to a radar channel and receiving a respective first RF radar signal from the radar channel. The first RF radar signal included at least one radar echo of the transmitted RF oscillator signal. Further, the method includes applying the RF oscillator signal to an artificial radar target composed of circuitry, which applies a delay and a gain to the RF oscillator signal, to generate a second RF radar signal. The second RF radar signal is modulated by a modulation signal thus generating a frequency-shifted RF radar signal. Further, the method includes subtracting the frequency-shifted RF radar signal from the first RF radar signal.

Abstract: A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.

Abstract: Exemplary embodiments disclosed herein relate to a radar device. In accordance with one example of the present invention the radar device includes an RF transceiver configured to transmit an RF oscillator signal to a radar channel and receive a respective first RF radar signal from the radar channel. The radar device further includes an artificial radar target composed of circuitry that provides a gain and a delay to the RF oscillator signal to generate a second RF radar signal. A first frequency conversion circuit, which includes a first mixer, is configured to down-convert the first RF radar signal, and a second frequency conversion circuit, which includes a second mixer, is configured to down-convert the second RF radar signal. An analog-to digital conversion unit is configured to digitize the down-converted first RF radar signal and the down-converted second RF radar signal to generate a first digital signal and a second digital signal, respectively.

Abstract: A method for estimating phase noise of an RF oscillator signal in a frequency-modulated continuous-wave (FMCW) radar system and related radar devices are provided. The method includes applying the RF oscillator signal to an artificial radar target composed of circuitry, which applies a delay and a gain to the RF oscillator signal, to generate an RF radar signal. Furthermore, the method includes down-converting the RF radar signal received from the artificial radar target from an RF frequency band to a base band, digitizing the down-converted RF radar signal to generate a digital radar signal, and calculating a decorrelated phase noise signal from the digital radar signal. A power spectral density of the decorrelated phase noise is then calculated from the decorrelated phase noise signal, and the power spectral density of the decorrelated phase noise is converted into a power spectral density of the phase noise of an RF oscillator signal.

Abstract: One exemplary embodiment of the present invention relates to a circuit that includes at least one RF signal path for an RF signal and at least one power sensor, which is coupled to the RF signal path and configured to generate a sensor signal representing the power of the RF signal during normal operation of the circuit. The circuit further includes a circuit node for receiving an RF test signal during calibration operation of the circuit. The circuit node is coupled to the at least one power sensor, so that the at least one power sensor receives the RF test signal additionally or alternatively to the RF signal and generates the sensor signal as representing the power of the RF test signal.

Abstract: An RF receiver device includes a semiconductor chip in a chip package, and a test signal generator integrated in the chip. The test signal generator generates an RF test signal including first information. An RF receiver circuit integrated in the chip receives an RF input signal, down-converts the RF input signal into an intermediate frequency (IF) or base band, and digitizes the down-converted signal to obtain a digital signal. An RF receive channel includes a coupler having first and second input ports and an output port. The output port is coupled to the input of the RF receiver circuit, the first input port receives an antenna signal and the second input port receives the test signal from the test signal generator. A signal processor is integrated in the chip and determines, during a test cycle, whether the first information in the digital signal matches a predetermined criterion.

Abstract: An RF receiver device includes a semiconductor chip in a chip package, and a test signal generator integrated in the chip. The test signal generator generates an RF test signal including first information. An RF receiver circuit integrated in the chip receives an RF input signal, down-converts the RF input signal into an intermediate frequency (IF) or base band, and digitizes the down-converted signal to obtain a digital signal. An RF receive channel includes a coupler having first and second input ports and an output port. The output port is coupled to the input of the RF receiver circuit, the first input port receives an antenna signal and the second input port receives the test signal from the test signal generator. A signal processor is integrated in the chip and determines, during a test cycle, whether the first information in the digital signal matches a predetermined criterion.

Abstract: An RF receiver device includes a semiconductor chip in a chip package, and a test signal generator integrated in the chip. The test signal generator generates an RF test signal including first information. An RF receiver circuit integrated in the chip receives an RF input signal, down-converts the RF input signal into an intermediate frequency (IF) or base band, and digitizes the down-converted signal to obtain a digital signal. An RF receive channel includes a coupler having first and second input ports and an output port. The output port is coupled to the input of the RF receiver circuit, the first input port receives an antenna signal and the second input port receives the test signal from the test signal generator. A signal processor is integrated in the chip and determines, during a test cycle, whether the first information in the digital signal matches a predetermined criterion.

Abstract: An RF receiver device includes a semiconductor chip in a chip package, and a test signal generator integrated in the chip. The test signal generator generates an RF test signal including first information. An RF receiver circuit integrated in the chip receives an RF input signal, down-converts the RF input signal into an intermediate frequency (IF) or base band, and digitizes the down-converted signal to obtain a digital signal. An RF receive channel includes a coupler having first and second input ports and an output port. The output port is coupled to the input of the RF receiver circuit, the first input port receives an antenna signal and the second input port receives the test signal from the test signal generator. A signal processor is integrated in the chip and determines, during a test cycle, whether the first information in the digital signal matches a predetermined criterion.