Abstract: Disclosed is a biphasic electrically conductive perovskite-based mixed oxide of the structure ABO3 with A=Ba, and B=Co, comprising additionally 5-45 at %, preferably 15 to 30 at %, particularly preferably 25 at % Co3O4 (at % Co based on the total number of Co atoms in the perovskite ABO3 and 0.5 to 0.3 at %, preferably 1 to 2.5 at %, particularly preferably 2 at % (wherein the at % are referred to the total number of B cations in the perovskite ABO3) Ti as dopant. Preferably, the mixed oxide has the stoichiometric formula BaCo1?xTixO3??:Co3O4 with x=0.005 to 0.03, preferably x=0.01 to 0.025, particularly preferably x=0.02, wherein ? defines the vacancies in the perovskite structure and is in the range of about 0.1 to 0.8, preferably 0.3 to 0.7, particularly preferably about 0.5 to 0.6.

Abstract: Disclosed is a biphasic electrically conductive perovskite-based mixed oxide of the structure ABO3 with A=Ba, and B=Co, comprising additionally 5-45 at %, preferably 15 to 30 at %, particularly preferably 25 at % Co3O4 (at % Co based on the total number of Co atoms in the perovskite ABO3 and 0.5 to 3 at %, preferably 1 to 2.5 at %, particularly preferably 2 at % (wherein the at % are referred to the total number of B cations in the perovskite ABO3) Ti as dopant. Preferably, the mixed oxide has the stoichiometric formula BaCo1?xTixO3??:Co3O4 with x=0.005 to 0.03, preferably x=0.01 to 0.025, particularly preferably x=0.02, wherein ? defines the vacancies in the perovskite structure and is in the range of about 0.1 to 0.8, preferably 0.3 to 0.7, particularly preferably about 0.5 to 0.6.

Abstract: A method for producing layers of ReRAM memories includes applying a TMO layer to a lower electrode, and implanting, via ion implantation, impurity atoms in the TMO layer.

Abstract: A method for reading out a resistive memory cell comprising two electrodes that are spaced from each other by an ion-conducting resistive material was developed, the memory cells being transferrable from a stable state having a higher resistance value (high resistive state, HRS) to a stable state having a lower resistance value (low resistive state, LRS) when a write voltage is applied.

Abstract: A method for reading out a resistive memory cell comprising two electrodes that are spaced from each other by an ion-conducting resistive material was developed, the memory cells being transferrable from a stable state having a higher resistance value (high resistive state, HRS) to a stable state having a lower resistance value (low resistive state, LRS) when a write voltage is applied.

Abstract: A method for reading out a non-volatile memory element having at least two stable states 0 and 1. This memory element comprises at least one resistive memory cell, which encodes the two states 0 and 1 into a state HRS having higher electrical resistance and a state LRS having lower electrical resistance. In the two states 0 and 1, the memory element has differing capacitances C0,1; this difference is used to determine which state is present. A memory element is selected in which a fixed capacitance that is independent of the state of the memory cell is connected in series with the memory cell. A series connection of a resistive memory cell with a fixed capacitance, instead of with a second resistive memory cell, improves the signal strength during capacitive read-out. The second memory cell becomes indispensable for the memory function when the memory element is read out capacitively.

Abstract: A method for reading out a non-volatile memory element having at least two stable states 0 and 1. This memory element comprises at least one resistive memory cell, which encodes the two states 0 and 1 into a state HRS having higher electrical resistance and a state LRS having lower electrical resistance. In the two states 0 and 1, the memory element has differing capacitances C0,1; this difference is used to determine which state is present. A memory element is selected in which a fixed capacitance that is independent of the state of the memory cell is connected in series with the memory cell. A series connection of a resistive memory cell with a fixed capacitance, instead of with a second resistive memory cell, improves the signal strength during capacitive read-out. The second memory cell becomes indispensable for the memory function when the memory element is read out capacitively.

Abstract: A method for reading out a memory element comprises a series connection. of at least two memory cells A and B each have a stable state A0 or B0 having higher resistance and a stable state A1 or B1 having lower electrical resistance. An electrical variable of the series circuit is measured and an electrical variable is selected for this measurement, to which the memory cell A in state A0 makes a different contribution than the memory cell B in state B0 and/or to which the memory cell A instate A1 makes a different contribution than the memory cell B in state B1. The two state combinations A1 and B0 or A0 and B1 then result in differing values for the electrical variable that is measured by way of the series circuit. These state combinations can thus be distinguished from each other without having to change the logic state of the memory element during reading.

Abstract: A method for reading out a memory element comprises a series connection. of at least two memory cells A and B each have a stable state A0 or B0 having higher resistance and a stable state A1 or B1 having lower electrical resistance. An electrical variable of the series circuit is measured and an electrical variable is selected for this measurement, to which the memory cell A in state A0 makes a different contribution than the memory cell B in state B0 and/or to which the memory cell A instate A1 makes a different contribution than the memory cell B in state B1. The two state combinations A1 and B0 or A0 and B1 then result in differing values for the electrical variable that is measured by way of the series circuit. These state combinations can thus be distinguished from each other without having to change the logic state of the memory element during reading.

Abstract: Disclosed is a memory element, a stack, and a memory matrix in which the memory element can be used. Also disclosed is a method for operating the memory matrix, and to a method for determining the true value of a logic operation in an array comprising memory elements. The memory element has at least a first stable state 0 and a second stable state 1. By applying a first write voltage V0, this memory element can be transferred into the high-impedance state 0 and by applying a second write voltage V1, it can be transferred into the likewise high-impedance state 1. By applying a read voltage VR, the magnitude of which is smaller than the write voltages V0 and V1, the memory element exhibits different electrical resistance values. In the parasitic current paths occurring in a memory matrix, the memory element acts as a high-impedance resistor, without in principle being limited to unipolar switching.

Abstract: Disclosed is a memory element, a stack, and to a memory matrix in which the memory element can be used. Also disclosed is a method for operating the memory matrix, and to a method for determining the true value of a logic operation in an array comprising memory elements. The memory element has at least a first stable state 0 and a second stable state 1. By applying a first write voltage V0, this memory element can be transferred into the high-impedance state 0 and by applying a second write voltage V1, it can be transferred into the likewise high-impedance state 1. By applying a read voltage VR, the magnitude of which is smaller than the write voltages V0 and V1, the memory element exhibits different electrical resistance values. In the parasitic current paths occurring in a memory matrix, the memory element acts as a high-impedance resistor, without in principle being limited to unipolar switching.

Abstract: Disclosed is a memory element, a stack, and a memory matrix in which the memory element can be used. Also disclosed is a method for operating the memory matrix, and to a method for determining the true value of a logic operation in an array comprising memory elements. The memory element has at least a first stable state 0 and a second stable state 1. By applying a first write voltage V0, this memory element can be transferred into the high-impedance state 0 and by applying a second write voltage V1, it can be transferred into the likewise high-impedance state 1. By applying a read voltage VR, the magnitude of which is smaller than the write voltages V0 and V1, the memory element exhibits different electrical resistance values. In the parasitic current paths occurring in a memory matrix, the memory element acts as a high-impedance resistor, without in principle being limited to unipolar switching.

Abstract: A force sensor based on an organic field effect transistor applied on a substrate is disclosed. In one embodiment, a mechanical force acting on the transistor causes a change in its source-drain voltage or its source-drain current which corresponds to said force and which can in each case be detected as measurement quantity for the acting force, a diaphragm-based pressure sensor that uses a force sensor of this type, a one- or two-dimensional position sensor that uses a multiplicity of force sensors of this type, and a fingerprint sensor that uses a multiplicity of such force sensors.

Abstract: In a method for producing ferroelectric strontium bismuth tantalate having the composition SrxBiyTa2O9 (SBT) or SrxBiy(Ta, Nb)2O9 (SBTN), the element strontium, which is normally present in an amount y=2, is provided in excess in a range from 2.1≦y≦3.0. This makes it possible to carry out the heat treatment step for converting the deposited material into the ferroelectric phase at a temperature T1, which is lower than 700° C. In addition, the strontium content x can be reduced from a nominal value of 1 to 0.7.

Abstract: In a method for producing ferroelectric strontium bismuth tantalate having the composition SrxBiyTa2O9 (SBT) or SrxBiy(Ta, Nb)2O9 (SBTN), the element strontium, which is normally present in an amount y=2, is provided in excess in a range from 2.1≦y≦3.0. This makes it possible to carry out the heat treatment step for converting the deposited material into the ferroelectric phase at a temperature T1, which is lower than 700° C. In addition, the strontium content x can be reduced from a nominal value of 1 to 0.7.

Abstract: A structural arrangement for NOx sensors including a first selectively oxygen ion-conductive layer and a second gas-permeable, nonconductive layer, the latter having a porous spinel structure or porous platinum. The oxygen ion-conductive layer made from a mixed-conductive ceramic can have an additional layer of a material which is catalytically inactive to NOx.

Abstract: A load-dependent, preventive fuse with an electronic ceramic (12) in a housing (11) from which connection leads (14) are led outwards to detect at least a first type of load to which a device to be monitored is subjected, in which fuse use is made of a ceramic material, hereinafter referred to as TDR ceramic (12), whose electrically insulating state changes as a function of time, being the first type of load, and as a function of a second type of load, to a semiconducting state, and as a result thereof, when a dc voltage U is applied to the TDR ceramic (12) via connection leads (14) an increase in current forms the activation criterion for the fuse, which criterion is fulfilled under predeterminable conditions and determines a desired operating time .tau..

Abstract: Fine, monodisperse oxide powders can be manufactured by means of a method which does not require expensive production facilities, in which methoda graphite intercalation compound is manufactured by reacting one or more chemical starting compounds of one or more elements of the groups Ib, IIa, IIb, IIIa, IIIb, IVa, IVb, Va, Vb, VIa, VIb, VIIb, VIII of the periodic table as well as of the lanthanides and actinides with a graphitic carbon modification having a grain size.ltoreq.150 .mu.m, andthe graphite intercalation compound is converted by an oxidation agent into binary oxide of one or more elements of the groups Ib, IIa, IIb, IIIa, IIIb, IVa, IVb, Va, Vb, VIa, VIb, VIIb, VIII of the periodic table as well as of the lanthanides and actinides.