Abstract: A ZuluNumber, discerned from a QR code, is received from a client. A database is accessed to retrieve enhanced information associated with the ZuluNumber and store information from the client. The enhanced information is sent to the client for display or execution. The enhanced information is updated to reflect a change in ownership when a substantially equivalent first object having a first ZuluNumber is delivered due to closer proximity as opposed to a second object having a second ZuluNumber.

Abstract: A ZuluNumber, discerned from a QR code, is received from a client. A database is accessed to retrieve enhanced information associated with the ZuluNumber and store information from the client. The enhanced information is sent to the client for display or execution. The enhanced information is updated to reflect a change in ownership when a substantially equivalent first object having a first ZuluNumber is delivered due to closer proximity as opposed to a second object having a second ZuluNumber.

Abstract: A zulu number, discerned from a QR code, is received from a client. A database is accessed to retrieve enhanced information associated with the zulu number and store information from the client. The enhanced information is sent to the client for display or execution.

Abstract: A zulu number, discerned from a QR code, is received from a client. A database is accessed to retrieve enhanced information associated with the zulu number and store information from the client. The enhanced information is sent to the client for display or execution.

Abstract: Ohmic contacts are attached to n-type Gallium Arsenide with an alloy of Aluminum-Germanium. The contact is prepared by depositing by evaporation a sequence of 400 Angstroms of Germanium, 300 Angstroms of Nickel, and 2000 Angstroms of Aluminum and subsequent alloying.

Abstract: A complementary GaAs Transistor pair is formed of a p-type MODFET and an n-type FET having an ion-implanted channel doping with a heterojunction gate. One set of structures is implemented in a planar process utilizing molecular beam epitaxy. The p-MODFET threshold voltage is determined by the thickness and doping of the p-AlGaAs layer plus the Schottky barrier height of the metal gate, and the ion implantation dosage is adjusted to give the proper threshold voltage for the enhancement mode n-channel heterojunction FET.

Abstract: Ultra low-power GaAs complementary junction field effect transistors are implemented in the design of complementary integrated circuits using a planar technology in conjunction with multiple and selective ion implantation. Both junction FETs, namely the p and n channel devices, are enhancement mode devices and biased in the forward direction thus leading to the advantageous DCFL (directly coupled field effect transistor logic) with one power supply, low power dissipation and high packing densities, all prerequisites for VLSI (very large scale integration).

Abstract: Ultra low-power GaAs complementary junction field effect transistors are implemented in the design of complementary integrated circuits using a planar technology in conjunction with multiple and selective ion implantation. Both junction FETs, namely the p and n channel devices, are enhancement mode devices and biased in the forward direction thus leading to the advantageous DCFL (directly coupled field effect transistor logic) with one power supply, low power dissipation and high packing densities, all prerequisites for VLSI (very large scale integration).

Abstract: The disclosed apparatus is a temperature tracking narrow band optical range finder which includes a prior art GaAs laser diode for emitting a laser energy pulse to a target and an improved GaAs avalanche detector for receiving a reflected pulse from the target. This range finder can be arranged in a single optical axis with the laser diode electrically shielded from the detector and the reflected pulse defocused so as to impinge on the detector area surrounding the laser diode, or it can be arranged by combining the emitted and reflected pulse in an interspersed fiber optical plane.

Abstract: A short-ranging laser system having an improved pulser which includes a drive pulse signal generator and a driver. The drive pulse signal generator is essentially a triggered bipolar avalanche transistor that outputs a drive pulse signal through a voltage shifting circuit to the driver. The driver is essentially two parallel-connected power MOSFETs that output a driver pulse to a GaAs heterojunction laser diode. By circuit design, the deadtime plateau is substantially reduced so that the laser return energy homodynes with the still active laser to produce a detectable output for a target within 5 meters.

Abstract: A dual sensitivity photodetector comprising a central region comprising a relatively high sensitivity reach through avalanche photo diode and a surrounding region comprising a relatively lower sensitivity P-type intrinsic N-type photodiode is disclosed which possesses the advantages of a wide sensitivity range and a relative freedom from overload.

Abstract: An electrical circuit is shown having first and second pluralities of junction field effect transistors connected with an output transistor to provide NOR/NAND gate logic operation. The junction field effect transistors are preferably enhancement mode junction field effect transistors selected so that the circuit can be constructed as described on an integrated circuit chip.

Abstract: Transistor device exhibiting negative resistance characteristics includes an enhancement mode insulated gate field effect transistor interacting with an integral bipolar transistor. The transistor device has a bulk region separated from a shallow substrate region by a pn-junction located in proximity to source and drain regions of the field effect transistor. The source region also serves as the emitter, the substrate region serves as the base, and the bulk region serves as the collector of the integral bipolar transistor wherein the substrate base is left floating. Normally, the collector of the bipolar transistor is connected to the gate of the field effect transistor, and a resistor of finite value is included in the gate circuit. Oscillator, astable multivibrator, gated oscillator, gated astable multivibrator, and bistable multivibrator circuits are illustratively constructed with the transistor device.

Abstract: A single gate field-effect transistor including a semi-insulating substrate for providing a one-sided device geometry, an isolating mesa formed from a layer of semi-conductor material provided on a substrate surface and which exhibits bulk negative resistance instabilities above a critical electric field strength, an extended gate structure provided in a gate region of the mesa, source and drain structures provided on the mesa at opposite sides of the gate structure, and electrical leads connected respectively to the gate, source and drain structures. The process for making the transistor, a multichannel (interdigitated structure) version, and a closed geometry (without mesa) version are also detailed.