Patents by Inventor RAIZY KELLERMAN
RAIZY KELLERMAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240303471Abstract: Implementations herein disclose an activation function for homomorphically-encrypted neural networks. A data-agnostic activation technique is provided that collects information about the distribution of the most-dominant activated locations in the feature maps of the trained model and maintains a map of those locations. This map, along with a defined percent of random locations, decides which neurons in the model are activated using an activation function. Advantages of implementations herein include allowing for efficient activation function computations in encrypted computations of neural networks, yet no data-dependent computation is done during inference time (e.g., data-agnostic). Implementations utilize negligible overhead in model storage, while preserving the same accuracy as with general activation functions and runs in orders of magnitude faster than approximation-based activation functions.Type: ApplicationFiled: March 6, 2023Publication date: September 12, 2024Applicant: Intel CorporationInventors: Raizy Kellerman, Alex Nayshtut, Omer Ben-Shalom
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Patent number: 11567761Abstract: The present disclosure provides privacy preservation of analytic workflows based on splitting the workflow into sub-workflows each with different privacy-preserving characteristics. Libraries are generated that provide for formatting and/or encrypting data for use in the sub-workflows and also for compiling a machine learning algorithm for the sub-workflows. Subsequently, the sub-workflows can be executed using the compiled algorithm and formatted data.Type: GrantFiled: June 25, 2020Date of Patent: January 31, 2023Assignee: Intel CorporationInventors: Itamar Levin, Guilad Melzer, Alex Nayshtut, Raizy Kellerman
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Publication number: 20220101206Abstract: An apparatus is disclosed. The apparatus comprises one or more processors to generate measurement matrices for a plurality of edge devices in a federated learning system, transmit the matrices to the plurality of edge devices, receive sampled trained model update data from the plurality of edge devices and reconstruct the sampled trained model update data using the measurement matrices to generate the trained model update data.Type: ApplicationFiled: December 8, 2021Publication date: March 31, 2022Applicant: Intel CorporationInventors: Raizy Kellerman, Alex Nayshtut, Omer Ben-Shalom, Oleg Pogorelik
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Publication number: 20210264274Abstract: Partitioning a deep neural network (DNN) model into one or more sets of one or more private layers and one or more sets of one or more public layers, a set of one or more private layers being at least one key in a cryptographic system; and deploying the partitioned DNN model on one or more computing systems.Type: ApplicationFiled: May 6, 2021Publication date: August 26, 2021Applicant: Intel CorporationInventors: Raizy Kellerman, Michael Kounavis, Omer Ben-Shalom, Alex Nayshtut, Oleg Pogorelik
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Patent number: 10956789Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve computing system utilization. An example system includes a visual recognition controller to determine whether an infrared image of the device corresponds to a first utilization state of the device based on a machine-learning model, and generate a report including the first utilization state, and at least one processor to execute one or more actions to adjust operation of the device from the first utilization state to a second utilization state based on the report obtained from the visual recognition controller, the second utilization state corresponding to reduced utilization compared to the first utilization state.Type: GrantFiled: March 28, 2019Date of Patent: March 23, 2021Assignee: INTEL CORPORATIONInventors: Oleg Pogorelik, Alexandra Manevitch, Raizy Kellerman
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Patent number: 10949711Abstract: Embodiments are generally directed to non-maximum suppression of features for object detection. An embodiment of an apparatus includes a central processing unit (CPU); a graphical processing unit (GPU), the GPU being capable of a plurality of processing threads; a memory to store data for object detection, including data for detected features within an image; and an object detection algorithm including a non-maximum suppression element. The object detection algorithm is to provide for non-maximum suppression of features that are detected in an image, including the apparatus to divide the image into grid of cells and to provide parallel processing for each feature according to each of one or more cells the feature is located within.Type: GrantFiled: April 23, 2018Date of Patent: March 16, 2021Assignee: INTEL CORPORATIONInventor: Raizy Kellerman
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Publication number: 20200326937Abstract: The present disclosure provides privacy preservation of analytic workflows based on splitting the workflow into sub-workflows each with different privacy-preserving characteristics. Libraries are generated that provide for formatting and/or encrypting data for use in the sub-workflows and also for compiling a machine learning algorithm for the sub-workflows. Subsequently, the sub-workflows can be executed using the compiled algorithm and formatted data.Type: ApplicationFiled: June 25, 2020Publication date: October 15, 2020Applicant: Intel CorporationInventors: Itamar Levin, Guilad Melzer, Alex Nayshtut, Raizy Kellerman
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Publication number: 20190325263Abstract: Embodiments are generally directed to non-maximum suppression of features for object detection. An embodiment of an apparatus includes a central processing unit (CPU); a graphical processing unit (GPU), the GPU being capable of a plurality of processing threads; a memory to store data for object detection, including data for detected features within an image; and an object detection algorithm including a non-maximum suppression element. The object detection algorithm is to provide for non-maximum suppression of features that are detected in an image, including the apparatus to divide the image into grid of cells and to provide parallel processing for each feature according to each of one or more cells the feature is located within.Type: ApplicationFiled: April 23, 2018Publication date: October 24, 2019Applicant: Intel CorporationInventor: RAIZY KELLERMAN
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Publication number: 20190220381Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve computing system utilization. An example system includes a visual recognition controller to determine whether an infrared image of the device corresponds to a first utilization state of the device based on a machine-learning model, and generate a report including the first utilization state, and at least one processor to execute one or more actions to adjust operation of the device from the first utilization state to a second utilization state based on the report obtained from the visual recognition controller, the second utilization state corresponding to reduced utilization compared to the first utilization state.Type: ApplicationFiled: March 28, 2019Publication date: July 18, 2019Inventors: OLEG POGORELIK, ALEXANDRA MANEVITCH, RAIZY KELLERMAN
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Publication number: 20190130917Abstract: A text-only transcription of spoken input from one or more speakers is enhanced with context information that indicate the speakers' states, including physical, emotional, and mental conditions. Context information includes information sensed or otherwise gathered from the speakers' surroundings. The contextual information in the resulting enhanced transcription can facilitate a more accurate understanding of the speakers' intended meaning, and thus avoid misunderstandings that can be detrimental to the relationship between speaker and listener and avoid time consuming activity to rectify misunderstandings.Type: ApplicationFiled: December 27, 2018Publication date: May 2, 2019Inventors: Oleg Pogorelik, Sean J. W. Lawrence, Adel Fuchs, Denis Klimov, Raizy Kellerman, Sapir Hamawie, Sukanya Sundaresan, Ayeshwarya Baliram Mahajan
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Patent number: 9558560Abstract: Systems and methods may provide for obtaining data associated with an image and using a plurality of threads in a graphics processor to conduct a single instruction multiple data (SIMD) scan of the data. Additionally, systems and methods may provide for generating a plurality of connection tables corresponding to the plurality of threads based on the SIMD scan. In one example, a plurality of threads in the graphics processor are used to conduct a single phase merge of the plurality of connection tables onto a global connected components labeling (CCL) table for the image.Type: GrantFiled: March 14, 2014Date of Patent: January 31, 2017Assignee: Intel CorporationInventors: Avigdor Eldar, Noam Teomim, Alexandra Manevitch, Amos Goldman, Liad Aben Zour, Orly Weisel, Raizy Kellerman
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Publication number: 20150262369Abstract: Systems and methods may provide for obtaining data associated with an image and using a plurality of threads in a graphics processor to conduct a single instruction multiple data (SIMD) scan of the data. Additionally, systems and methods may provide for generating a plurality of connection tables corresponding to the plurality of threads based on the SIMD scan. In one example, a plurality of threads in the graphics processor are used to conduct a single phase merge of the plurality of connection tables onto a global connected components labeling (CCL) table for the image.Type: ApplicationFiled: March 14, 2014Publication date: September 17, 2015Inventors: AVIGDOR ELDAR, NOAM TEOMIM, ALEXANDRA MANEVITCH, AMOS GOLDMAN, LIAD ABEN ZOUR, ORLY WEISEL, RAIZY KELLERMAN