Patents by Inventor Raja C T Anand

Raja C T Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cross-talk reduction for high speed signaling at ball grid array region and connector region
    Patent number: 10292257
    Abstract: A multilayered printed circuit board (PCB) may include a plurality of pads associated with facilitating a connection to a component. The component may include a first edge and a second edge. The plurality of pads may include a first pad, located between a second pad and the first edge. The PCB may include a plurality of vertically disposed vias electrically connected to the plurality of pads and a plurality of horizontally disposed signal layers, electrically connected by the plurality of vias, to route a set of signals toward the first edge. The set of signals may include a first signal that is routed by a first via, of the plurality of vias, and a first signal layer of the plurality of signal layers and a second signal that is routed by a second via, of the plurality of vias, and a second signal layer of the plurality of signal layers.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: May 14, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Raja C T Anand, Satish Kumar Brugumalla
  • Cross-talk reduction for high speed signaling at ball grid array region and connector region
    Patent number: 9907156
    Abstract: A multilayered printed circuit board (PCB) may include a plurality of pads associated with facilitating a connection to a component. The component may include a first edge and a second edge. The plurality of pads may include a first pad, located between a second pad and the first edge. The PCB may include a plurality of vertically disposed vias electrically connected to the plurality of pads and a plurality of horizontally disposed signal layers, electrically connected by the plurality of vias, to route a set of signals toward the first edge. The set of signals may include a first signal that is routed by a first via, of the plurality of vias, and a first signal layer of the plurality of signal layers and a second signal that is routed by a second via, of the plurality of vias, and a second signal layer of the plurality of signal layers.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: February 27, 2018
    Assignee: Juniper Networks, Inc.
    Inventors: Raja C T Anand, Satish Kumar Brugumalla