Patents by Inventor Raja Sunkara

Raja Sunkara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050071043
    Abstract: A method for providing distributed material management and flow control in an integrated circuit (IC) factory. The IC factory comprises a factory stocker, a plurality of process bays and a factory transport agent for moving wafer cassettes between the bay and the stocker. Each of the bays comprises a bay stocker, a plurality of tools, a mini-stocker and a bay transport agent for moving wafers amongst the bay components. The apparatus uses partitioned stockers to facilitate deadlock avoidance or deadlock resolution. Additionally, various algorithms are used to detect wafer cassette movement situations where deadlocks may result from a wafer cassette movement within a bay and for resolving deadlocks when they occur.
    Type: Application
    Filed: November 15, 2004
    Publication date: March 31, 2005
    Inventors: Dusan Jevtic, Raja Sunkara
  • Patent number: 6684123
    Abstract: A factory interface for a multiple chamber semiconductor wafer processing cluster tool having a K-wafer load-lock (KWLL). The KWLL comprises a variable number of K+1 wafer slots assigned as inbound and outbound slots. Inbound slots are used to send up to K+1 wafers into the cluster tool and the same slots, denoted as outbound slots, are used for receiving up to K+1 wafers from the cluster tool. The K+1 slots are in the same volume that has to be pumped for wafers to enter the tool and vented for wafers that to leave the tool. These K+1 slots accommodate up to K wafers when accessed by a single blade robots from the tool or the factory interface, and up to K+1 wafers when the tool and factory interface are equipped with dual blade robots. Various KWLL loading methods can be selected to optimize the throughput of a wafer processing system using the KWLL. Such methods include wafer packing, reactive and gamma tolerant methods.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: January 27, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Dusan Jevtic, Raja Sunkara
  • Patent number: 6519498
    Abstract: A method and apparatus for analyzing schedules for multi-cluster tools that are used in semiconductor wafer processing and similar manufacturing applications. The method and apparatus comprise a schedule analyzer and a pass-through chamber manager. The apparatus allows the user to analyze N! possible scheduling routines (algorithms) for a given multi-cluster tool configuration and a given N-step process sequence. The invention derives a plurality of possible scheduling algorithms for a given set of input parameters and then compares the algorithms by allowing either the user or an automated process to assign each processing step within the proposed schedule a rank ordered priority. Other process or wafer movement parameters may also be given ranges such that the invention can automatically derive optimal schedules with respect to various parameter values.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: February 11, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Dusan Jevtic, Mark Pool, Raja Sunkara
  • Publication number: 20030000468
    Abstract: A factory interface for a multiple chamber semiconductor wafer processing cluster tool having a K-wafer load-lock (KWLL). The KWLL comprises a variable number of K+1 wafer slots assigned as inbound and outbound slots. Inbound slots are used to send up to K+1 wafers into the cluster tool and the same slots, denoted as outbound slots, are used for receiving up to K+1 wafers from the cluster tool. The K+1 slots are in the same volume that has to be pumped for wafers to enter the tool and vented for wafers that to leave the tool. These K+1 slots accommodate up to K wafers when accessed by a single blade robots from the tool or the factory interface, and up to K+1 wafers when the tool and factory interface are equipped with dual blade robots. Various KWLL loading methods can be selected to optimize the throughput of a wafer processing system using the KWLL. Such methods include wafer packing, reactive and gamma tolerant methods.
    Type: Application
    Filed: June 26, 2001
    Publication date: January 2, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Dusan Jevtic, Raja Sunkara