Patents by Inventor Raja V.
Raja V. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143515Abstract: A system includes host interface circuitry to interact with a host system and that includes an address translation circuit, which includes request staging queues to buffer the address translation requests, each includes a virtual address and received from a host interface circuit. Pending response queues buffer respective address translation requests that are waiting for an address translation from the host system while maintaining an order as received within the request stage queues. Reordering buffers reorder address translations, which are to be supplied to the host interface circuits, according to the order maintained within the pending response queues, each address translation includes a physical address mapped to the virtual address of a corresponding address translation request. A cache stores multiple of the address translations, associated with the address translation requests, for future access by the host interface circuits.Type: ApplicationFiled: October 10, 2023Publication date: May 2, 2024Inventors: Sumangal Chakrabarty, Prateek Sharma, Raja V. S. Halaharivi, Yoav Weinberg, Di Hsien Ngu
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Publication number: 20240069771Abstract: In some implementations, a memory device may receive, from a host device, a read command indicating data and one or more logical block addresses to be read from a memory of the memory device. The memory device may obtain a memory unit from the memory based on the read command. The memory device may determine status information associated with the one or more logical block addresses based on information indicated by the memory unit. The memory device may generate a single data transfer request associated with the one or more logical block addresses, where the single data transfer request indicates status indicators associated with respective logical block addresses of the one or more logical block addresses. The memory device may provide, to the host device, one or more responses to the read command, where the one or more responses are based on the status indicators.Type: ApplicationFiled: August 29, 2022Publication date: February 29, 2024Inventors: Scheheresade VIRANI, Raja V.S. HALAHARIVI, Ning ZHAO
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Publication number: 20240069732Abstract: A system includes a memory device, a first interface port and a second interface port operatively coupled with the memory device, and a processing device, operatively coupled with the memory device, to perform operations including: detecting a triggering event associated with the first interface port; responsive to detecting the triggering event, sending an interrupt message to a firmware component of the memory device; receiving, from the firmware component, a configuration setting based on the interrupt message; and allocating, by the processing device, one or more resources to the first interface port according to the configuration setting.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Inventors: Raja V.S. Halaharivi, Prateek Sharma
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Publication number: 20240069807Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving, from a host system, a memory access command; executing the memory access command; identifying a characteristic associated with the memory access command; identifying a threshold period of time corresponding to the characteristic associated with the memory access command; determining that a period of time associated with the memory access command satisfies the threshold period of time; and responsive to determining that the period of time associated with the memory access command satisfies the threshold period of time, notifying the host system of completion of execution of the memory access command.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Inventors: Raja V.S. Halaharivi, Prateek Sharma, Venkat R. Gaddam
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Patent number: 11823667Abstract: Techniques for modifying rules for completing requests using a conversational interface are disclosed. A conversational interface receives a user request to perform a particular function. A system extracts semantic content from the request and obtains contextual metadata associated with the request. Using the semantic content and contextual metadata, the system generates a data set of attribute values. The system determines whether the data set matches a data set of required data attributes associated with the request. If the provided data set is different than the required data set, the system determines whether to modify a set of rules associated with the request. The set of rules specifies which attribute values are required to complete the request. When the system modifies the rules associated with the request, the system also determines whether to apply the rule modification to subsequent requests by the same user and other users.Type: GrantFiled: February 14, 2022Date of Patent: November 21, 2023Assignee: Oracle International CorporationInventors: Raja V. Penneru, Kaarthik Balasubrahmanian, Donald Creig Humes, Sridhar Tadepalli, Saravanan Anandan, Kartik Raghavan
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Publication number: 20230065223Abstract: Techniques for modifying rules for completing requests using a conversational interface are disclosed. A conversational interface receives a user request to perform a particular function. A system extracts semantic content from the request and obtains contextual metadata associated with the request. Using the semantic content and contextual metadata, the system generates a data set of attribute values. The system determines whether the data set matches a data set of required data attributes associated with the request. If the provided data set is different than the required data set, the system determines whether to modify a set of rules associated with the request. The set of rules specifies which attribute values are required to complete the request. When the system modifies the rules associated with the request, the system also determines whether to apply the rule modification to subsequent requests by the same user and other users.Type: ApplicationFiled: February 14, 2022Publication date: March 2, 2023Applicant: Oracle International CorporationInventors: Raja V. Penneru, Kaarthik Balasubrahmanian, Donald Creig Humes, Sridhar Tadepalli, Saravanan Anandan, Kartik Raghavan
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Out of order SGL read sorting in a mixed system with PRP read or system that supports only SGL reads
Patent number: 9990138Abstract: A data storage device includes a non-volatile semiconductor storage device and a controller that is configured to issue first and second read requests in that order, to read data from the non-volatile semiconductor storage device, in response to receiving a read command, and store read responses to the first and second read requests in a queue in the order they are received. The queue is a circular buffer having a write pointer, a read pointer, and a special read pointer associated therewith, the write pointer being advanced each time contents are written into the buffer, the read pointer being advanced when oldest valid contents in the buffer are read, and the special read pointer being advanced when valid contents in the buffer, excluding the oldest valid contents, are read. As a result, instead of sorting read responses associated with the read command prior to storing them in the queue, the read responses are stored in the queue in the order they are received.Type: GrantFiled: March 31, 2015Date of Patent: June 5, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventor: Raja V. S. Halaharivi -
Patent number: 9870157Abstract: A data storage device includes a non-volatile semiconductor storage device and a controller that is configured to perform interleaving of small reads with large reads and small writes with large writes. In the example of reads, the controller receives a sequence of read commands including a first read command having a read size larger than a read threshold size and a second read command having a read size smaller than the read threshold size, and issue first and second read requests in succession to read data of a predetermined size less than the read threshold size, from the non-volatile semiconductor storage device. The interleaving is achieved by issuing the first read request to execute the first read command and the second read request to execute the second read command. As a result of this interleaving, the second read command will have a chance to complete earlier than the first read command even though it was received by the controller later in time.Type: GrantFiled: March 31, 2015Date of Patent: January 16, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Raja V. S. Halaharivi, Tony Chheang, Dishi Lai, Fred Au
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Patent number: 9853787Abstract: Methods and system for carrier frequency offset (CFO) estimation are described. The method includes determining correlation values between a plurality of samples from a received signal and a plurality of reference signals corresponding to a plurality of CFO candidates. A set of correlation values which exceeds a threshold is determined and a corresponding CFO candidate for each correlation value in the set is selected. A CFO estimate based on an interpolation of selected CFO candidates is then calculated.Type: GrantFiled: August 25, 2015Date of Patent: December 26, 2017Assignee: NXP USA, INC.Inventors: Mihai-Ionut Stanciu, Raja V. Tamma, Khurram Waheed
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Patent number: 9794056Abstract: A method and apparatus for identifying a search window of carrier-frequency-offset-corrected samples in which a first intermediate signal from a demodulator does not exceed a predetermined threshold, convolving a second intermediate signal from the demodulator within the search window with a predefined pattern to provide a convolution result, determining if an absolute peak of the convolution result exceeds a preamble pattern confirmation threshold, in response to the absolute peak of the convolution result exceeding the preamble confirmation threshold, confirming a preamble pattern detection event to provide a confirmed preamble pattern detection event of a confirmed preamble pattern, and receiving a signal including the confirmed preamble pattern to provide a received digital signal extracted from the signal.Type: GrantFiled: October 3, 2016Date of Patent: October 17, 2017Assignee: NXP USA, Inc.Inventors: Raja V. Tamma, Claudio Rey
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Patent number: 9729195Abstract: At least one embodiment of a correlator comprising a plurality of correlator taps is configurable to provide synchronization and symbol modulation for a plurality of modulation systems. Among other uses, at least one embodiment of the correlator can provide a coarse symbol timing value. In response to determining the coarse symbol timing value, a receiver can receive a signal. Among other uses, at least one embodiment of the correlator can provide a carrier frequency offset (CFO) estimate. In response to determining the CFO estimate, a receiver can receive a signal.Type: GrantFiled: December 7, 2015Date of Patent: August 8, 2017Assignee: NXP USA, Inc.Inventors: Raja V. Tamma, Justin A. Fritz, Mihai-Ionut M. Stanciu
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Publication number: 20170099077Abstract: At least one embodiment of a correlator comprising a plurality of correlator taps is configurable to provide synchronization and symbol modulation for a plurality of modulation systems. Among other uses, at least one embodiment of the correlator can provide a coarse symbol timing value. In response to determining the coarse symbol timing value, a receiver can receive a signal. Among other uses, at least one embodiment of the correlator can provide a carrier frequency offset (CFO) estimate. In response to determining the CFO estimate, a receiver can receive a signal.Type: ApplicationFiled: December 7, 2015Publication date: April 6, 2017Inventors: Raja V. Tamma, Justin A. Fritz, Mihai-Ionut M. Stanciu
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Publication number: 20160381581Abstract: Methods and system for carrier frequency offset (CFO) estimation are described. The method includes determining correlation values between a plurality of samples from a received signal and a plurality of reference signals corresponding to a plurality of CFO candidates. A set of correlation values which exceeds a threshold is determined and a corresponding CFO candidate for each correlation value in the set is selected. A CFO estimate based on an interpolation of selected CFO candidates is then calculated.Type: ApplicationFiled: August 25, 2015Publication date: December 29, 2016Inventors: MIHAI-IONUT STANCIU, RAJA V. TAMMA, KHURRAM WAHEED
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OUT OF ORDER SGL READ SORTING IN A MIXED SYSTEM WITH PRP READ OR SYSTEM THAT SUPPORTS ONLY SGL READS
Publication number: 20160291868Abstract: A data storage device includes a non-volatile semiconductor storage device and a controller that is configured to issue first and second read requests in that order, to read data from the non-volatile semiconductor storage device, in response to receiving a read command, and store read responses to the first and second read requests in a queue in the order they are received. The queue is a circular buffer having a write pointer, a read pointer, and a special read pointer associated therewith, the write pointer being advanced each time contents are written into the buffer, the read pointer being advanced when oldest valid contents in the buffer are read, and the special read pointer being advanced when valid contents in the buffer, excluding the oldest valid contents, are read. As a result, instead of sorting read responses associated with the read command prior to storing them in the queue, the read responses are stored in the queue in the order they are received.Type: ApplicationFiled: March 31, 2015Publication date: October 6, 2016Inventor: Raja V.S. HALAHARIVI -
Publication number: 20160291884Abstract: A data storage device includes a non-volatile semiconductor storage device and a controller that is configured to perform interleaving of small reads with large reads and small writes with large writes. In the example of reads, the controller receives a sequence of read commands including a first read command having a read size larger than a read threshold size and a second read command having a read size smaller than the read threshold size, and issue first and second read requests in succession to read data of a predetermined size less than the read threshold size, from the non-volatile semiconductor storage device. The interleaving is achieved by issuing the first read request to execute the first read command and the second read request to execute the second read command. As a result of this interleaving, the second read command will have a chance to complete earlier than the first read command even though it was received by the controller later in time.Type: ApplicationFiled: March 31, 2015Publication date: October 6, 2016Inventors: Raja V.S. HALAHARIVI, Tony CHHEANG, Dishi LAI, Fred AU
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Patent number: 9385909Abstract: A technique for detecting symbols includes performing an over-sized discrete Fourier transform (DFT) operation on a received signal that includes at least two repeated symbols. A sum of signal characteristics for subcarriers of one or more possible symbols are determined based on the DFT operation. A sum of signal characteristics for non-subcarriers of the one or more possible symbols is determined based on the DFT operation. Finally, a determination is made as to whether one or more of the one or more possible symbols is detected based on the sum of signal characteristics for the subcarriers and sum of signal characteristics for the non-subcarriers.Type: GrantFiled: October 8, 2013Date of Patent: July 5, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Raja V. Tamma, Kevin Traylor
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Patent number: 9282525Abstract: Methods and systems are disclosed for frequency-domain symbol and frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency components associated with subcarriers within the multi-carrier communication signals. Symbol synchronization is performed in the frequency domain by performing correlation(s) between frequency components of the received signal and frequency-domain synchronization symbol(s). After symbol synchronization, frame synchronization correlation is also performed in the frequency domain between frequency components of the received signal and frequency-domain synchronization symbol(s). The disclosed embodiments are particularly useful for symbol and frame synchronization in multi-carrier received signals for power line communication (PLC) systems and/or other harsh noisy communication environments.Type: GrantFiled: June 24, 2013Date of Patent: March 8, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor, Khurram Waheed
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Patent number: 9112754Abstract: A technique for generating a bit log-likelihood ratio (LLR) in a communication system includes generating a demodulated signal based on a received symbol and a reference symbol. An input for a bit LLR generator is generated based on the demodulated signal and a normalization value that is based on the received symbol or the reference symbol. A bit LLR is generated for the received symbol, using the bit LLR generator, based on the input.Type: GrantFiled: October 8, 2013Date of Patent: August 18, 2015Assignee: Freescale Semiconductor, Inc.Inventor: Raja V. Tamma
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Patent number: 9106499Abstract: Methods and systems are disclosed for frequency-domain frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency domain components associated with subcarriers within the multi-carrier communication signals. A sliding-window correlation (e.g., two-dimensional sliding window) is applied to the received symbols represented in the frequency domain to detect frame boundaries for multi-carrier signals. The sliding-window frame synchronization can be applied by itself or can be applied in combination with one or more additional frame synchronization stages. The disclosed embodiments are particularly useful for frame synchronization of multi-carrier signals in PLC (power line communication) systems.Type: GrantFiled: June 24, 2013Date of Patent: August 11, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
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Patent number: 9100261Abstract: Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved.Type: GrantFiled: June 24, 2013Date of Patent: August 4, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor