Patents by Inventor Rajagopal (Ananth) Ananthanarayanan

Rajagopal (Ananth) Ananthanarayanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8005773
    Abstract: A cortical simulator optimizing the simulation scale and time through computationally efficient simulation of neurons in a clock-driven and synapses in an event-driven fashion, memory efficient representation of simulation state, and communication efficient message exchanges.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rajagopal (Ananth) Ananthanarayanan, Dharmendra Shantilal Modha
  • Patent number: 7818273
    Abstract: A cortical simulator optimizing the simulation scale and time through computationally efficient simulation of neurons in a clock-driven and synapses in an event-driven fashion, memory efficient representation of simulation state, and communication efficient message exchanges.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: October 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Rajagopal (Ananth) Ananthanarayanan, Dharmendra Shantilal Modha
  • Publication number: 20090099989
    Abstract: A cortical simulator optimizing the simulation scale and time through computationally efficient simulation of neurons in a clock-driven and synapses in an event-driven fashion, memory efficient representation of simulation state, and communication efficient message exchanges.
    Type: Application
    Filed: March 25, 2008
    Publication date: April 16, 2009
    Inventors: Rajagopal Ananth Ananthanarayanan, Dharmendra Shantilal Modha
  • Publication number: 20090076993
    Abstract: A cortical simulator optimizing the simulation scale and time through computationally efficient simulation of neurons in a clock-driven and synapses in an event-driven fashion, memory efficient representation of simulation state, and communication efficient message exchanges.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: RAJAGOPAL (ANANTH) ANANTHANARAYANAN, DHARMENDRA SHANTILAL MODHA