Patents by Inventor Rajagopalan Parthasarathi

Rajagopalan Parthasarathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8258016
    Abstract: Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The package includes a ESD shield attached to the substrate. The ESD shield configured to increase the ESD hardness of the package. The ESD shield can further serve to stiffen the package to prevent warping and operate as a heat spreader.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: September 4, 2012
    Assignee: LSI Corporation
    Inventors: Choshu Ito, William M. Loh, Rajagopalan Parthasarathy
  • Patent number: 8138209
    Abstract: The invention provides novel compounds of formula I: that are monoamine oxidase-B inhibitors, which can be useful in treating obesity, diabetes, and/or cardiometabolic disorders (e.g., hypertension, dyslipidemias, high blood pressure, and insulin resistance).
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: March 20, 2012
    Assignee: Jenrin Discovery, Inc.
    Inventors: John Francis McElroy, Robert J. Chorvat, Rajagopalan Parthasarathi
  • Patent number: 7956220
    Abstract: The invention provides novel compounds of formulae I and II: that are monoamine oxidase-B inhibitors, which can be useful in treating obesity, diabetes, and/or cardiometabolic disorders (e.g., hypertension, dyslipidemias, high blood pressure, and insulin resistance).
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 7, 2011
    Assignee: Jenrin Discovery
    Inventors: John Francis McElroy, Robert J. Chorvat, Rajagopalan Parthasarathi
  • Publication number: 20090104735
    Abstract: Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The package includes a ESD shield attached to the substrate. The ESD shield configured to increase the ESD hardness of the package. The ESD shield can further serve to stiffen the package to prevent warping and operate as a heat spreader.
    Type: Application
    Filed: December 17, 2008
    Publication date: April 23, 2009
    Applicant: LSI Logic Corporation
    Inventors: Choshu Ito, William M. Loh, Rajagopalan Parthasarathy
  • Patent number: 7498664
    Abstract: Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The package includes a ESD shield attached to the substrate. The ESD shield configured to increase the ESD hardness of the package. The ESD shield can further serve to stiffen the package to prevent warping and operate as a heat spreader.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: March 3, 2009
    Assignee: LSI Corporation
    Inventors: Choshu Ito, William M. Loh, Rajagopalan Parthasarathy
  • Publication number: 20070132083
    Abstract: Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The package includes a ESD shield attached to the substrate. The ESD shield configured to increase the ESD hardness of the package. The ESD shield can further serve to stiffen the package to prevent warping and operate as a heat spreader.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 14, 2007
    Inventors: Choshu Ito, William Loh, Rajagopalan Parthasarathy
  • Publication number: 20070078172
    Abstract: The invention provides a method of treating obesity, diabetes, and/or cardiometabolic disorders (e.g., hypertension, dyslipidemias, high blood pressure, and insulin resistance) in a mammal by administering to the mammal a therapeutically effective amount of an irreversible MAO-B inhibitor.
    Type: Application
    Filed: June 15, 2006
    Publication date: April 5, 2007
    Applicant: JENRIN DISCOVERY
    Inventors: John McElroy, Robert Chorvat, Rajagopalan Parthasarathi
  • Publication number: 20070015734
    Abstract: The invention provides novel compounds of formula I: that are monoamine oxidase-B inhibitors, which can be useful in treating obesity, diabetes, and/or cardiometabolic disorders (e.g., hypertension, dyslipidemias, high blood pressure, and insulin resistance).
    Type: Application
    Filed: July 12, 2006
    Publication date: January 18, 2007
    Applicant: JENRIN DISCOVERY
    Inventors: John McElroy, Robert Chorvat, Rajagopalan Parthasarathi
  • Publication number: 20070004683
    Abstract: The invention provides novel compounds of formulae I and II: that are monoamine oxidase-B inhibitors, which can be useful in treating obesity, diabetes, and/or cardiometabolic disorders (e.g., hypertension, dyslipidemias, high blood pressure, and insulin resistance).
    Type: Application
    Filed: June 30, 2006
    Publication date: January 4, 2007
    Applicant: JENRIN DISCOVERY
    Inventors: John McElroy, Robert Chorvat, Rajagopalan Parthasarathi
  • Patent number: 7145232
    Abstract: A semiconductor package construction aimed at improving thermal performance. A heatspreader is provided having a metal alloy preform attached to it already. Then, a few dots of conductive epoxy are dispensed around the die. The heatspreader with the preformed metal alloy is pressed on the adhesive and then the part is cured. By coupling the die to the heatspreader with conductive epoxy, the die is constrained from warping. By removing the necessity of coating the die, the cost of fabrication is reduced. There is only a very marginal cost increase in the back end for dispensing the dots. For this, the process and equipment already exists in the backend. By reducing die backside warpage due, the die remains in good contact with the heatspreader, thus improving thermal performance.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: December 5, 2006
    Assignee: LSI Logic Corporation
    Inventors: Rajagopalan Parthasarathy, Kishore Desai, Yogendra Ranade
  • Publication number: 20060071327
    Abstract: A semiconductor package construction aimed at improving thermal performance. A heatspreader is provided having a metal alloy preform attached to it already. Then, a few dots of conductive epoxy are dispensed around the die. The heatspreader with the preformed metal alloy is pressed on the adhesive and then the part is cured. By coupling the die to the heatspreader with conductive epoxy, the die is constrained from warping. By removing the necessity of coating the die, the cost of fabrication is reduced. There is only a very marginal cost increase in the back end for dispensing the dots. For this, the process and equipment already exists in the backend. By reducing die backside warpage due, the die remains in good contact with the heatspreader, thus improving thermal performance.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 6, 2006
    Inventors: Rajagopalan Parthasarathy, Kishore Desai, Yogendra Ranade
  • Publication number: 20060043603
    Abstract: Techniques for utilizing a bonding agent that allows a solder reflow process to occur at a lower reflow temperature. One area of use includes semiconductor device manufacturing processes. The bonding agent is placed between a solder ball and a contact surface. The bonding agent has a melting temperature that is lower than that of the solder ball. Reflow is then performed at a relative low temperature that is high enough for reflowing the bonding agent, yet at the same time, lower than what would be necessary to reflow the solder material. Since, the electrical system is not subjected to the high temperatures necessary for reflowing the solder material, the electronic system experiences less high-temperature related damage.
    Type: Application
    Filed: August 31, 2004
    Publication date: March 2, 2006
    Applicant: LSI Logic Corporation
    Inventors: Yogendra Ranade, Rajagopalan Parthasarathy, Jeffrey Hall