Patents by Inventor Rajah V. Vysyaraju

Rajah V. Vysyaraju has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7459974
    Abstract: A distortion cancellation amplifier is described having a main amplifier and an error amplifier. The main amplifier, in response to an input signal, generates an output signal having an amplified signal component and a distortion signal component. The error amplifier is sized and biased to generate, in response to the same input signal, a distortion signal component that has substantially the same magnitude as the distortion signal component of the main amplifier. The distortion signal component from the error amplifier is subtracted from the output signal of the main amplifier.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: December 2, 2008
    Assignee: Anadigics, Inc.
    Inventors: Douglas M. Johnson, Rajah V. Vysyaraju, Steven Seiz
  • Publication number: 20080186096
    Abstract: A distortion cancellation amplifier is described having a main amplifier and an error amplifier. The main amplifier, in response to an input signal, generates an output signal having an amplified signal component and a distortion signal component. The error amplifier is sized and biased to generate, in response to the same input signal, a distortion signal component that has substantially the same magnitude as the distortion signal component of the main amplifier. The distortion signal component from the error amplifier is subtracted from the output signal of the main amplifier.
    Type: Application
    Filed: November 27, 2007
    Publication date: August 7, 2008
    Inventors: Douglas M. Johnson, Rajah V. Vysyaraju, Steven Seiz
  • Patent number: 7301396
    Abstract: A distortion cancellation amplifier is described having a main amplifier and an error amplifier. The main amplifier, in response to an input signal, generates an output signal having an amplified signal component and a distortion signal component. The error amplifier is sized and biased to generate, in response to the same input signal, a distortion signal component that has substantially the same magnitude as the distortion signal component of the main amplifier. The distortion signal component from the error amplifier is subtracted from the output signal of the main amplifier.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: November 27, 2007
    Assignee: Anadigics, Inc.
    Inventors: Douglas M. Johnson, Rajah V. Vysyaraju