Patents by Inventor Rajamohan Varambally

Rajamohan Varambally has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6598190
    Abstract: A memory device generator for generating memory devices in a CAD environment, the generator composed of a library file containing predefined basic circuit components; memory array generation algorithm interacting with the library file for generating a variable-size memory array representation having a variable number of memory elements, and at least one redundant memory element; memory element selection circuit generation algorithm interacting with the library file for generating a memory element selection circuit to be associated with the memory array for selecting at least one memory element according to memory device address inputs.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: July 22, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Piero Capocelli, Michele Taliercio, Rajamohan Varambally, Andrea Baroni
  • Patent number: 5703821
    Abstract: A single-port RAM generator architecture, for the generation of different RAM structures in a CAD environment, and to test the operation capabilities of the different RAM structure, The architecture includes a Static RAM matrix and a self timed architecture, which includes a control logic, both a dummy row and a dummy column having respectively equivalent load of a word line and of bit column of said matrix. The dummy column is discharged at a faster rate than the corresponding bit column optimizing the timing and reducing power consumption. Different column multiplexer selections provide different RAMs for a selected RAM size, each having slightly different silicon area and timing performance.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: December 30, 1997
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Andrea Baroni, Giovanni Mastrodomenico, Michele Taliercio, Piero Capocelli, Luigi Carro, Rajamohan Varambally
  • Patent number: 5471428
    Abstract: A single-port RAM generator architecture, for the generation of different RAM structures in a CAD environment, and to test the operation capabilities of the different RAM structure. The architecture includes a Static RAM matrix and a self timed architecture, which includes a control logic, both a dummy row and a dummy column having respectively equivalent load of a word line and of bit column of said matrix. The dummy column is discharged at a faster rate than the corresponding bit column optimizing the timing and reducing power consumption. Different column multiplexer selections provide different RAMs for a selected RAM size, each having slightly different silicon area and timing performance.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: November 28, 1995
    Assignee: SGS-Thomson Microelectronics S.r.l
    Inventors: Andrea Baroni, Giovanni Mastrodomenico, Taliercio Michele, Piero Capocelli, Luigi Carro, Rajamohan Varambally