Patents by Inventor Rajan Aggarwal

Rajan Aggarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8645779
    Abstract: A method for scan testing an integrated circuit that includes a plurality of on-chip logic modules includes configuring the integrated circuit for module level scan testing and chip level scan testing by way of an external automatic test pattern generator (ATPG) tool. The ATPG tool generates first and second sets of test patterns for module level and chip level scan testing of the integrated circuit. The ATPG tool generates the second set of test patterns by excluding the design faults which have already been targeted during the module level scan testing, from the first set of test patterns and reduces the overall time required for scan testing the integrated circuit.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rajan Aggarwal, Ashutosh Anand, Ankit Bhargava, Mishika Singla, Prashant K. Sonone
  • Publication number: 20130346819
    Abstract: A method for scan testing an integrated circuit that includes a plurality of on-chip logic modules includes configuring the integrated circuit for module level scan testing and chip level scan testing by way of an external automatic test pattern generator (ATPG) tool. The ATPG tool generates first and second sets of test patterns for module level and chip level scan testing of the integrated circuit. The ATPG tool generates the second set of test patterns by excluding the design faults which have already been targeted during the module level scan testing, from the first set of test patterns and reduces the overall time required for scan testing the integrated circuit.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Rajan Aggarwal, Ashutosh Anand, Ankit Bhargava, Mishika Singla, Prashant K. Sonone
  • Patent number: 7733422
    Abstract: An apparatus, for use in a receiver configured to receive electronic signals, for identifying digital signals that are available for reception, includes a timing recovery device configured to receive an incoming signal, related to a transmitted signal, the incoming signal having a first symbol rate, and to re-sample the incoming signal to provide a second symbol rate, and an analyzer that is in communication with the timing recovery device and that is configured to make a determination as to whether a difference between the second symbol rate and a third symbol rate of a transmitter providing the transmitted signal is within an acceptable tolerance and to use the determination in an analysis of whether the transmitted signal is available for reception.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: June 8, 2010
    Assignee: ATI Technologies, Inc.
    Inventors: Rajan Aggarwal, Mark Hryszko, Samuel H. Reichgott, Punyabrata Ray, Stephen L. Biracree, Binning Chen, Raul A. Casas
  • Publication number: 20100042582
    Abstract: A method for identification of application interdependency. The method includes receiving dependency data in a Application Interdependency Identification Tool (AIIT) system, and identifying a plurality of applications and dependency relationships corresponding to the dependency data by a dependency engine. The method also includes displaying the dependency data according to the identified applications and dependency relationships. There is also an AIIT system including a dependency engine and a dependency database. The AIIT system is configured to receive dependency data. The dependency engine is configured to identify a plurality of applications and dependency relationships corresponding to the dependency data and display the dependency data according to the identified applications and dependency relationships.
    Type: Application
    Filed: August 12, 2008
    Publication date: February 18, 2010
    Applicant: Electronic Data Systems Corporation
    Inventors: Rajan Aggarwal, Walter P. Schortmann, Thomas W. Johnson, Adam J. Hardin, Srinivasan G. Embar
  • Publication number: 20090295995
    Abstract: An apparatus, for use in a receiver configured to receive electronic signals, for identifying digital signals that are available for reception, includes a timing recovery device configured to receive an incoming signal, related to a transmitted signal, the incoming signal having a first symbol rate, and to re-sample the incoming signal to provide a second symbol rate, and an analyzer that is in communication with the timing recovery device and that is configured to make a determination as to whether a difference between the second symbol rate and a third symbol rate of a transmitter providing the transmitted signal is within an acceptable tolerance and to use the determination in an analysis of whether the transmitted signal is available for reception.
    Type: Application
    Filed: August 10, 2009
    Publication date: December 3, 2009
    Applicant: ATI Technologies, Inc.
    Inventors: Rajan Aggarwal, Mark Hryszko, Samuel H. Reichgott, Punyabrata Ray, Stephen L. Biracree, Binning Chen, Raul A. Casas
  • Patent number: 7573531
    Abstract: An apparatus, for use in a receiver configured to receive electronic signals, for identifying digital signals that are available for reception, includes a timing recovery device configured to receive an incoming signal, related to a transmitted signal, the incoming signal having a first symbol rate, and to re-sample the incoming signal to provide a second symbol rate, and an analyzer that is in communication with the timing recovery device and that is configured to make a determination as to whether a difference between the second symbol rate and a third symbol rate of a transmitter providing the transmitted signal is within an acceptable tolerance and to use the determination in an analysis of whether the transmitted signal is available for reception.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: August 11, 2009
    Assignee: ATI Technologies, Inc.
    Inventors: Rajan Aggarwal, Mark Hryszko, Samuel H. Reichgott, Punyabrata Ray, Stephen L. Biracree, Binning Chen, Raul A. Casas