Patents by Inventor Rajan Arora
Rajan Arora has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240094144Abstract: In some examples, a wafer bow measurement system comprises a measurement unit including: a wafer support assembly to impart rotational movement to a measured wafer supported in the measurement unit; an optical sensor; a calibration standard to calibrate the optical sensor; a linear stage actuator to impart linear direction of movement to the optical sensor; a wafer centering sensor to determine a centering of the measured wafer supported in the measurement unit; and a wafer alignment sensor to determine an alignment of the measured wafer supported in the measurement unit.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Inventors: Rajan Arora, Michael Souza, Wayne Tang, Yassine Kabouzi, Ye Feng
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Patent number: 11885750Abstract: In some examples, a wafer bow measurement system comprises a measurement unit including: a wafer support assembly to impart rotational movement to a measured wafer supported in the measurement unit; an optical sensor; a calibration standard to calibrate the optical sensor; a linear stage actuator to impart linear direction of movement to the optical sensor; a wafer centering sensor to determine a centering of the measured wafer supported in the measurement unit; and a wafer alignment sensor to determine an alignment of the measured wafer supported in the measurement unit.Type: GrantFiled: January 24, 2020Date of Patent: January 30, 2024Assignee: Lam Research CorporationInventors: Rajan Arora, Michael Souza, Wayne Tang, Yassine Kabouzi, Ye Feng
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Publication number: 20220334554Abstract: A large beam spot spectral reflectometer system for measuring a substrate is provided. Hardware components for collecting in situ large beam spot optical signals is disclosed. Machine learning models for denoising large beam spot optical signals are disclosed. Machine learning models for interpreting in situ optical data and facilitating process control are also disclosed.Type: ApplicationFiled: April 15, 2022Publication date: October 20, 2022Applicant: Lam Research CorporationInventors: Ye Feng, Seonkyung Lee, Rajan Arora, Jorge Luque
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Publication number: 20220074869Abstract: In some examples, a wafer bow measurement system comprises a measurement unit including: a wafer support assembly to impart rotational movement to a measured wafer supported in the measurement unit, an optical sensor, a calibration standard to calibrate the optical sensor; a linear stage actuator to impart linear direction of movement to the optical sensor; a wafer centering sensor to determine a centering of the measured wafer supported in the measurement unit; and a wafer alignment sensor to determine an alignment of the measured wafer supported in the measurement unit.Type: ApplicationFiled: January 24, 2020Publication date: March 10, 2022Inventors: Rajan Arora, Michael Souza, Wayne Tang, Yassine Kabouzi, Ye Feng
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Patent number: 10989652Abstract: A metrology system for substrate processing includes an optical metrology station including a plurality of optical sensors to measure spectra from a plurality of measurement locations on a substrate. A plurality of fiber cables are connected to the plurality of optical sensors. A spectrometer is selectively connected to the plurality of fiber cables. A mass metrology station measures at least one of a mass or mass change of the substrate. A controller includes a modelling module to generate thickness values at the plurality of measurement locations based on the spectra from the plurality of measurement locations and a learned model. A spatial modelling module generates a spatial thickness distribution model for the substrate based on the thickness values at the plurality of measurement locations from the modelling module and the at least one of the mass or the mass change from the mass metrology station.Type: GrantFiled: September 6, 2017Date of Patent: April 27, 2021Assignee: LAM RESEARCH CORPORATIONInventors: Ye Feng, Rajan Arora, Jason Shields
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Patent number: 10416092Abstract: Methods and apparatus for detecting the presence or absence of unwanted metal deposits on a substrate holder of an electroplating apparatus are described herein. In various embodiments, a plating sensor is used to detect unwanted metal deposits. The plating sensor may be mounted relatively far away from the area that it measures (e.g., the sensor target area). For instance, the plating sensor may be on one side of the electroplating apparatus (in some cases mounted on a drip shield), and the sensor target area may be on the opposite side of the electroplating apparatus. In this way, the plating sensor can measure across the electroplating apparatus. This placement provides a relatively deep depth of focus for the plating sensor, and provides some physical separation between the plating sensor and the electroplating chemistry. Both of these factors lead to more reliable detection results.Type: GrantFiled: June 29, 2017Date of Patent: September 17, 2019Assignee: Lam Research CorporationInventors: Rajan Arora, Jared Herr, Jason Daniel Marchetti, Steven T. Mayer, James R. Zibrida
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Publication number: 20190072482Abstract: A metrology system for substrate processing includes an optical metrology station including a plurality of optical sensors to measure spectra from a plurality of measurement locations on a substrate. A plurality of fiber cables are connected to the plurality of optical sensors. A spectrometer is selectively connected to the plurality of fiber cables. A mass metrology station measures at least one of a mass or mass change of the substrate. A controller includes a modelling module to generate thickness values at the plurality of measurement locations based on the spectra from the plurality of measurement locations and a learned model. A spatial modelling module generates a spatial thickness distribution model for the substrate based on the thickness values at the plurality of measurement locations from the modelling module and the at least one of the mass or the mass change from the mass metrology station.Type: ApplicationFiled: September 6, 2017Publication date: March 7, 2019Inventors: Ye Feng, Rajan Arora, Jason Shields
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Patent number: 10142429Abstract: Technologies are described for generating web presence data of an entity. In an example, a web presence processor may receive a request to generate the web presence data. The web presence processor may receive first and second service data relating to first and second web assets, respectively. The first web asset may be among a first set of web assets indexed by a first channel. The second web asset may be among a second set of web assets indexed by a second channel different from the first channel. The second set of web assets may be different from the first set of web assets. The web presence processor may further transform the first and second service data into the web presence data. The web presence processor may further cause an output of the web presence data on a display.Type: GrantFiled: October 7, 2015Date of Patent: November 27, 2018Assignee: CONDUCTOR, INC.Inventors: Joshua D. Rosenblum, Vishal R. Berry, Stephen Kim, Marina Yospe, Rajan Arora
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Publication number: 20170299524Abstract: Methods and apparatus for detecting the presence or absence of unwanted metal deposits on a substrate holder of an electroplating apparatus are described herein. In various embodiments, a plating sensor is used to detect unwanted metal deposits. The plating sensor may be mounted relatively far away from the area that it measures (e.g., the sensor target area). For instance, the plating sensor may be on one side of the electroplating apparatus (in some cases mounted on a drip shield), and the sensor target area may be on the opposite side of the electroplating apparatus. In this way, the plating sensor can measure across the electroplating apparatus. This placement provides a relatively deep depth of focus for the plating sensor, and provides some physical separation between the plating sensor and the electroplating chemistry. Both of these factors lead to more reliable detection results.Type: ApplicationFiled: June 29, 2017Publication date: October 19, 2017Inventors: Rajan Arora, Jared Herr, Jason Daniel Marchetti, Steven T. Mayer, James R. Zibrida
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Publication number: 20160100020Abstract: Technologies are described for generating web presence data of an entity. In an example, a web presence processor may receive a request to generate the web presence data. The web presence processor may receive first and second service data relating to first and second web assets, respectively. The first web asset may be among a first set of web assets indexed by a first channel. The second web asset may be among a second set of web assets indexed by a second channel different from the first channel. The second set of web assets may be different from the first set of web assets. The web presence processor may further transform the first and second service data into the web presence data. The web presence processor may further cause an output of the web presence data on a display.Type: ApplicationFiled: October 7, 2015Publication date: April 7, 2016Inventors: JOSHUA D. ROSENBLUM, Vishal R. Berry, Stephen Kim, Marina Yospe, Rajan Arora
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Publication number: 20160098733Abstract: Technologies are generally described for systems, devices and methods effective to generate a report. A keyword related to a product may be received. A network may be monitored for use of the keyword. Keyword data may be produced based on the use of the keyword on the network. Inventory information related to the product may be received from a memory. The keyword data and the inventory information may be transformed into a report. The report may reflect an association between the product and the use of the keyword on the network.Type: ApplicationFiled: October 7, 2015Publication date: April 7, 2016Inventors: RAJAN ARORA, BARUCH TOLEDANO
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Publication number: 20150193812Abstract: A system and method effective to generate a search engine report. A first processor may receive a search request and a web property. The first processor may send the search request and the web property to a search engine and receive a result set from the search engine based on the search request and the web property. The first processor may determine natural search engine data based on the result set. The first processor may send the search request and the web property to a second processor and receive paid search engine data based on the search request and the web property. The first processor may generate a report based on the natural search engine data and the paid search engine data.Type: ApplicationFiled: January 9, 2014Publication date: July 9, 2015Applicant: CONDUCTOR, INC.Inventor: RAJAN ARORA
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Patent number: 8612923Abstract: Methods, systems, computer program products for editing electrical circuits that facilitate and speed the layout of electrical circuits. Embodiments provide high-altitude editing capabilities to the user that enable the user to more easily select circuit items in congested layouts and schematic diagrams, and modify and arrange circuit items with respect to one another in congested layouts and schematic diagrams. Additional embodiments are directed to enabling EDA commands and the like to have context sensitivity, neighborhood awareness, and/or an ability to anticipate intentions of the user.Type: GrantFiled: June 22, 2009Date of Patent: December 17, 2013Assignee: Cadence Design Systems, Inc.Inventors: Rajan Arora, Chayan Majumder, Sandipan Ghosh, Anil Kumar Arya
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Patent number: 8490038Abstract: A system, method, and computer program product for automatically placing contact cuts in integrated circuit layouts, particularly in guard rings, inter-layer via connections, and various space-filling structures typically defined by polygons or paths. Areas to be filled with contact cuts are partitioned horizontally and vertically, and decomposed into shared and exclusive type regions that are sorted directionally. Contact cuts are placed in each region according to its type and according to relevant design rules on contact cut spacing and enclosure constraints. Contact cuts that may cause design rule violations are deleted. Narrow jogs or cuts, merged shared regions, and non-orthogonal edges or segments in the decomposed regions are handled by alternate embodiments. The result is automated contact cut placement, even for merged/chopped layout features, that is generally more symmetric, collinear, and adds an optimal number of contact cuts in most cases than with existing tools.Type: GrantFiled: August 27, 2012Date of Patent: July 16, 2013Assignee: Cadence Dsign Systems, Inc.Inventors: Rajan Arora, Arnold Jean-Marie Gustave Ginetti, Gautam Kumar
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Patent number: 8364656Abstract: An improved approach to pcell caching is disclosed that enables safe and efficient multi-user access to pcell caches. Locking structures are used in conjunction with counters to provide multi-user support for pcell caches. When a modification occurs to cached pcell data, an update is made to the appropriate counter(s). The value(s) of the counters are checked to determine whether the item of data operated upon by an entity is still valid or if another concurrent entity has made changes to the data.Type: GrantFiled: October 31, 2008Date of Patent: January 29, 2013Assignee: Cadence Design Systems, Inc.Inventors: Rajan Arora, Randy Bishop, Arnold Ginetti, Gilles S. C. Lamant
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Patent number: 8271909Abstract: Embodiments of the invention provide system and methods for EDA tools. Specifically, some embodiments of the invention provide an input infrastructure for EDA tools that gathers pertinent information surrounding an input cursor's present locality (or neighborhood) and then analyzes the pertinent information in view of an issued command to automatically determine suitable targets or subsequent operations that a user of the EDA tool may want to select next.Type: GrantFiled: February 6, 2009Date of Patent: September 18, 2012Assignee: Cadence Design Systems, Inc.Inventors: Chayan Majumder, Sandipan Ghosh, Anil Kumar Arya, Pawan Kumar Fangaria, Rajan Arora
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Patent number: 7949987Abstract: An improved method and system are disclosed for utilizing abstracted versions of layout portions in conjunction with parameterized cells (pcells). One significant advantage is that abstracted versions of pcells can be generated from normal pcells and stored in a pcell cache, which avoids the need to abstract layout pcells on the fly.Type: GrantFiled: February 8, 2008Date of Patent: May 24, 2011Assignee: Cadence Design Systems, Inc.Inventors: Arnold Ginetti, Gilles S. C. Lamant, Randy Bishop, Rajan Arora
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Publication number: 20100205575Abstract: Disclosed are methods, systems, computer program products for editing electrical circuits that facilitate and speed the layout of electrical circuits. Embodiments disclosed herein provide high-altitude editing capabilities to the user that enable the user to more easily select circuit items in congested layouts and schematic diagrams, and modify and arrange circuit items with respect to one another in congested layouts and schematic diagrams. Additional embodiments disclosed herein are directed to enabling EDA commands and the like to have context sensitivity, neighborhood awareness, and/or an ability to anticipate intentions of the user.Type: ApplicationFiled: June 22, 2009Publication date: August 12, 2010Applicant: Cadence Design Systems, Inc.Inventors: Rajan Arora, Chayan Majumder, Sandipan Ghosh, Anil Kumar Arya
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Publication number: 20100115207Abstract: An improved approach to pcell caching is disclosed that enables safe and efficient multi-user access to pcell caches. Locking structures are used in conjunction with counters to provide multi-user support for pcell caches. When a modification occurs to cached pcell data, an update is made to the appropriate counters). The value(s) of the counters are checked to determine whether the item of data operated upon by an entity is still valid or if another concurrent entity has made changes to the data.Type: ApplicationFiled: October 31, 2008Publication date: May 6, 2010Applicant: CADENCE DESIGN SYSTEMS, INC.Inventors: Rajan ARORA, Randy BISHOP, Arnold GINETTI, Gilles S.C. LAMANT
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Patent number: 7506277Abstract: An improved method, system, computer program product, and electronic design structures which provides the flexibility to IC designers to be able to relax the design rules to increase the yield and improve the layout productivity is disclosed. In some disclosed approaches, automated interactive aids and batch tools are provided which can assist in optimizing the final layouts for yield at the initial placement and/or routing stages for optimizing yield. Provided in some disclosed approaches are automated capability to layout designers at the mos devices level to configure mos devices as per different DFY recommendations from the foundry without negative effects on the overall chip area (or cell size). The design rules may be relaxed selectively on an instance basis and wherever possible or desirable.Type: GrantFiled: July 11, 2006Date of Patent: March 17, 2009Assignee: Cadence Design Systems, Inc.Inventors: Rajan Arora, Umesh Sisodia, Anurag Jain