Patents by Inventor Rajan Kumar Pandey

Rajan Kumar Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Effective Work Function Modulation by Metal Thickness and Nitrogen Ratio for a Last Approach CMOS Gate
    Publication number: 20130087856
    Abstract: A CMOS structure is formed on a semiconductor substrate that includes first and second regions having an nFET and a pFET respectively formed thereon. Each nFET and pFET device is provided with a gate, a source and drain, and a channel formed on the substrate. A high permittivity dielectric layer formed on top of the channel is superimposed to the permittivity dielectric layer. The pFET gate includes a thick metal nitride alloy layer or rich metal nitride alloy or carbon metal nitride layer that provides a controlled WF. Superimposed to the permittivity dielectric layer, the nFET gate is provided with a thin metal nitride alloy layer, enabling to control the WF. A metal deposition is formed on top of the respective nitride layers. The gate last approach characterized by having a high thermal budget smaller than 500° C. used for post metal deposition, following the dopant activation anneal.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: International Business Machines Corporation
    Inventors: Claude Ortolland, Unoh Kwon, Kota V.R.M. Murali, Edward J. Nowak, Rajan Kumar Pandey