Patents by Inventor Rajanatha Shettigara

Rajanatha Shettigara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230204780
    Abstract: A light detection and ranging (LIDAR) system may include a transceiver disposed on a first substrate and comprising a plurality of receiver detectors; and a shared clock source disposed remotely from the transceiver on a second substrate and comprising a shared clock that is structured and arranged to control and synchronize operation of the plurality of receiver detectors to determine time-of-flight or reflectance.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 29, 2023
    Inventor: Rajanatha Shettigara
  • Publication number: 20230168348
    Abstract: Methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. In one aspect, the outputs of multiple receive channels are electrically coupled before input to a single channel of an analog to digital converter. In another aspect, a DC offset voltage is provided at the output of each transimpedance amplifier of each receive channel to improve measured signal quality. In another aspect, a bias voltage supplied to each photodetector of each receive channel is adjusted based on measured temperature to save power and improve measurement consistency. In another aspect, a bias voltage supplied to each illumination source of each transmit channel is adjusted based on measured temperature. In another aspect, a multiplexer is employed to multiplex multiple sets of output signals of corresponding sets of receive channels before analog to digital conversion.
    Type: Application
    Filed: September 2, 2022
    Publication date: June 1, 2023
    Inventors: David S. Hall, Rajanatha Shettigara, Nathan Slattengren, Aaron Chen, Anand Gopalan
  • Patent number: 11435446
    Abstract: Methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. In one aspect, the outputs of multiple receive channels are electrically coupled before input to a single channel of an analog to digital converter. In another aspect, a DC offset voltage is provided at the output of each transimpedance amplifier of each receive channel to improve measured signal quality. In another aspect, a bias voltage supplied to each photodetector of each receive channel is adjusted based on measured temperature to save power and improve measurement consistency. In another aspect, a bias voltage supplied to each illumination source of each transmit channel is adjusted based on measured temperature. In another aspect, a multiplexer is employed to multiplex multiple sets of output signals of corresponding sets of receive channels before analog to digital conversion.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: September 6, 2022
    Assignee: VELODYNE LIDAR USA, INC.
    Inventors: David S. Hall, Rajanatha Shettigara, Nathan Slattengren, Aaron Chen, Anand Gopalan
  • Publication number: 20200379094
    Abstract: Methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. In one aspect, the outputs of multiple receive channels are electrically coupled before input to a single channel of an analog to digital converter. In another aspect, a DC offset voltage is provided at the output of each transimpedance amplifier of each receive channel to improve measured signal quality. In another aspect, a bias voltage supplied to each photodetector of each receive channel is adjusted based on measured temperature to save power and improve measurement consistency. In another aspect, a bias voltage supplied to each illumination source of each transmit channel is adjusted based on measured temperature. In another aspect, a multiplexer is employed to multiplex multiple sets of output signals of corresponding sets of receive channels before analog to digital conversion.
    Type: Application
    Filed: August 6, 2020
    Publication date: December 3, 2020
    Inventors: David S. Hall, Rajanatha Shettigara, Nathan Slattengren, Aaron Chen, Anand Gopalan
  • Patent number: 10739444
    Abstract: Methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. In one aspect, the outputs of multiple receive channels are electrically coupled before input to a single channel of an analog to digital converter. In another aspect, a DC offset voltage is provided at the output of each transimpedance amplifier of each receive channel to improve measured signal quality. In another aspect, a bias voltage supplied to each photodetector of each receive channel is adjusted based on measured temperature to save power and improve measurement consistency. In another aspect, a bias voltage supplied to each illumination source of each transmit channel is adjusted based on measured temperature. In another aspect, a multiplexer is employed to multiplex multiple sets of output signals of corresponding sets of receive channels before analog to digital conversion.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: August 11, 2020
    Assignee: VELODYNE LIDAR, INC.
    Inventors: David S. Hall, Rajanatha Shettigara, Nathan Slattengren, Aaron Chen, Anand Gopalan
  • Patent number: 10461918
    Abstract: A data transmission method includes, detecting an incoming link training sequence that is transmitted from an upstream transmitter, generating a marker indicating a timing location of a word included in the incoming link training sequence, generating a self link training sequence based on a local reference clock, adjusting a time difference in the incoming link training sequence and the self link training sequence, and retransmitting an incoming bit stream based on the self link training sequence being matched to the incoming link training sequence.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: October 29, 2019
    Assignee: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
    Inventors: Alan Kobayashi, Rajanatha Shettigara, Ramakrishna Chilukuri, Rahul Kumar Agarwal, Nobuhiro Yanagisawa, Sujan Valiyaka Thomas, Ryuichi Moriizumi, Satoru Kumashiro
  • Publication number: 20190178992
    Abstract: Methods and systems for combining return signals from multiple channels of a LIDAR measurement system are described herein. In one aspect, the outputs of multiple receive channels are electrically coupled before input to a single channel of an analog to digital converter. In another aspect, a DC offset voltage is provided at the output of each transimpedance amplifier of each receive channel to improve measured signal quality. In another aspect, a bias voltage supplied to each photodetector of each receive channel is adjusted based on measured temperature to save power and improve measurement consistency. In another aspect, a bias voltage supplied to each illumination source of each transmit channel is adjusted based on measured temperature. In another aspect, a multiplexer is employed to multiplex multiple sets of output signals of corresponding sets of receive channels before analog to digital conversion.
    Type: Application
    Filed: September 18, 2018
    Publication date: June 13, 2019
    Inventors: David S. Hall, Rajanatha Shettigara, Nathan Slattengren, Aaron Chen, Anand Gopalan
  • Publication number: 20190028262
    Abstract: A data transmission method includes, detecting an incoming link training sequence that is transmitted from an upstream transmitter, generating a marker indicating a timing location of a word included in the incoming link training sequence, generating a self link training sequence based on a local reference clock, adjusting a time difference in the incoming link training sequence and the self link training sequence, and retransmitting an incoming bit stream based on the self link training sequence being matched to the incoming link training sequence.
    Type: Application
    Filed: August 31, 2018
    Publication date: January 24, 2019
    Applicant: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
    Inventors: Alan KOBAYASHI, Rajanatha SHETTIGARA, Ramakrishna CHILUKURI, Rahul Kumar AGARWAL, Nobuhiro YANAGISAWA, Sujan Valiyaka THOMAS, Ryuichi MORIIZUMI, Satoru KUMASHIRO
  • Patent number: 7398443
    Abstract: System and method for automatic fault-testing of a logic block and the interfaces of macros with logic gates inside a chip, using an at-speed logic-BIST internal to the chip. Following an initialization of internal storage elements, a set of test signals are generated and processed by the logic block. The output of the logic block is accumulated into a signature and compared to a reference signature to detect faults. Testing can be performed on an ATE (Automatic Test Equipment) using a simple test vector, or can be performed by a field engineer on the actual board comprising the chip.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: July 8, 2008
    Assignee: Genesis Microchip Inc.
    Inventors: Venkat Chary Mushirabad, Rajanatha Shettigara
  • Patent number: 7222037
    Abstract: A method of automatic gain control in both analog and digital domain is performed by receiving an incoming analog signal, determining an overall gain factor, determining a coarse analog gain control value and a fine digital gain control value, each of which, when taken together substantially equals the already determined overall gain factor, modifying the incoming analog signal using the coarse analog gain control value to form a coarsely adjusted digital signal, digitizing the coarsely adjusted digital signal, and using the fine digital gain control value to process the coarsely adjusted digital signal to form an outgoing digital signal, wherein the outgoing digital signal has been modified in both the analog domain and subsequently in the digital domain to achieve an appropriate signal to noise ratio.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: May 22, 2007
    Assignee: Genesis Microchip Inc.
    Inventors: Venkat Chary Mushirahad, Sujan Thomas, Rajanatha Shettigara
  • Publication number: 20060107151
    Abstract: System and method for automatic fault-testing of a logic block and the interfaces of macros with logic gates inside a chip, using an at-speed logic-BIST internal to the chip. Following an initialization of internal storage elements, a set of test signals are generated and processed by the logic block. The output of the logic block is accumulated into a signature and compared to a reference signature to detect faults. Testing can be performed on an ATE (Automatic Test Equipment) using a simple test vector, or can be performed by a field engineer on the actual board comprising the chip.
    Type: Application
    Filed: May 31, 2005
    Publication date: May 18, 2006
    Inventors: Venkat Mushirabad, Rajanatha Shettigara
  • Publication number: 20060089813
    Abstract: A method of automatic gain control in both analog and digital domain is performed by receiving an incoming analog signal, determining an overall gain factor, determining a coarse analog gain control value and a fine digital gain control value, each of which, when taken together substantially equals the already determined overall gain factor, modifying the incoming analog signal using the coarse analog gain control value to form a coarsely adjusted digital signal, digitizing the coarsely adjusted digital signal, and using the fine digital gain control value to process the coarsely adjusted digital signal to form an outgoing digital signal, wherein the outgoing digital signal has been modified in both the analog domain and subsequently in the digital domain to achieve an appropriate signal to noise ratio.
    Type: Application
    Filed: August 10, 2005
    Publication date: April 27, 2006
    Applicant: Genesis Microchip Inc.
    Inventors: Venkat Mushirahad, Sujan Thomas, Rajanatha Shettigara