Patents by Inventor Rajaram REGUPATHY
Rajaram REGUPATHY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11451067Abstract: A method and device that implements communication over an interconnect to support improved power distribution over the interconnect. The device includes a controller to implement a device policy manager (DPM) to manage power allotment over the interconnect, and a battery feedback mechanism coupled to the controller, the battery feedback mechanism to detect a low or dead battery condition of a connected device over the interconnect and to indicate to the DPM to advertise a higher power charging level to the connected device.Type: GrantFiled: December 19, 2017Date of Patent: September 20, 2022Assignee: Intel CorporationInventors: Rajaram Regupathy, Nirmala Bailur, Rajeev Muralidhar
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Patent number: 11392512Abstract: Apparatuses, methods and storage medium associated with virtualizing a USB device controller of a SoC in a computing platform hosting multiple VMs, are disclosed herein. In some embodiments, a CRM includes instructions to implement a USB driver stack in a SOS of a SVM on the computing platform. The USB driver stack of the SOS includes a SOS device controller driver to communicate with one or more USB devices of the computing platform, via a USB device controller of the SoC; and a SOS function virtualization driver to communicate with one or more corresponding UVM function virtualization drivers of the UVMs to paravirtualize the SOS device controller driver to the UVMs. Other embodiments are also described and claimed.Type: GrantFiled: October 16, 2018Date of Patent: July 19, 2022Assignee: Intel CorporationInventors: Rajaram Regupathy, Abdul R. Ismail
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Publication number: 20220197842Abstract: A scheme to enhance USB-C port policy by dynamically entering optimal USB-C alternate mode with an informed feedback mechanism to OSPM which influences the USB-C port DPM. In some embodiments, when a USB4 device is connected to a port, the scheme parses the alternate modes and power characteristics from the class descriptor information of the enumerated device. In some embodiments, the parsed information is provided as a feedback to the OSPM that instructs the USB-C/PD DPM to enter or switch mode that shall meet the policy criteria of the OS configuration in a dynamic command control from the OS. In some embodiments, the USB-C DPM dynamically chooses to enter an optimal mode based on the power and thermal conditions information available in the embedded controller and indicate the OS about the changes. As such, the OS is aware of the USB operation mode.Type: ApplicationFiled: December 19, 2020Publication date: June 23, 2022Applicant: Intel CorporationInventors: Rajaram Regupathy, Abdul Ismail, Saranya Gopal, Peter Ewert, Purushotam Kumar, Vns Murthy Sristi
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Publication number: 20220156205Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to support post-manufacturing firmware extensions on computing platforms. An example non-transitory computer readable storage medium comprising instructions that, when executed, cause one or more processors to at least: based on a soft strap status indicator stored in a serial peripheral interface (SPI) memory, extract a silicon initialization code profile from the SPI memory and initialize the processor based on the silicon initialization code extension profile.Type: ApplicationFiled: September 23, 2021Publication date: May 19, 2022Inventors: Subrata Banik, Rajesh Poornachandran, Vincent Zimmer, Rajaram Regupathy, Fadi Zuhayri
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Publication number: 20220091853Abstract: A data processing system comprises a processing core to execute a basic input/output system (BIOS) as part of a boot process. The data processing system also comprises static random-access memory (SRAM) in communication with the processing core. The data processing system also comprises a pre-BIOS component in communication with the SRAM. The pre-BIOS component is configured to execute a pre-BIOS block of firmware before the processing core begins executing the BIOS. The pre-BIOS block, when executed by the pre-BIOS component, causes the pre-BIOS component to (a) initialize the pre-BIOS component, (b) measure an amount of time taken to initialize the pre-BIOS component, and (c) save the measured amount of time to the SRAM as a pre-BIOS boot-time record. Other embodiments are described and claimed.Type: ApplicationFiled: November 13, 2020Publication date: March 24, 2022Inventors: SUBRATA BANIK, ASAD AZAM, VINCENT JAMES ZIMMER, RAJARAM REGUPATHY
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Patent number: 11256639Abstract: A method and a device to participate in a managed Universal Serial Bus (USB) ecosystem. The method including establishing a connection with a plurality of devices in the ecosystem as a many-to-many relationship between extended USB device policy managers, and coordinating power and data exchange within the plurality of devices the ecosystem including at least one device that is not directly connected.Type: GrantFiled: October 23, 2017Date of Patent: February 22, 2022Assignee: Intel CorporationInventors: Rajaram Regupathy, Abdul R. Ismail
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Publication number: 20220012062Abstract: Methods, apparatus, systems, and articles of manufacture to increase boot performance are disclosed. An example apparatus including instructions stored in the apparatus; and processor circuitry to execute the instructions to: during a boot process: identify a boot task that is to be performed during the boot process; execute the boot task using a first processor component; collect data corresponding to the execution of the boot task on the first processor component; categorize the boot task based on the collected data; and generate an entry for a boot table based on the categorization, the boot table used to schedule the boot task on at least one of the first processor component or a second processor component different than the first processor component based on the categorization.Type: ApplicationFiled: September 22, 2021Publication date: January 13, 2022Inventors: Subrata Banik, Rajaram Regupathy, Vincent Zimmer, Julius Mandelblat
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Publication number: 20220012202Abstract: In one embodiment, an apparatus includes interconnect circuitry to implement one or more layers of a Universal Serial Bus (USB)-based protocol. The interconnect circuitry can implement a first USB-based interface and a second USB-based interface. The apparatus further includes telemetry circuitry to generate telemetry data, cause the telemetry data to be transmitted via the first USB-based interface, detect a power state transition in the apparatus, cause the telemetry data to be buffered based on detecting the power state transition, and cause the buffered telemetry data to be transmitted via the second USB-interface based on a set interface request indicating the second USB-interface.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Applicant: Intel CorporationInventors: Rajaram Regupathy, Rolf H. Kuehnis
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Publication number: 20220012150Abstract: Methods and apparatus for managing an endpoint device and associated updates are disclosed. An example apparatus includes circuitry to at least: query the endpoint device circuitry via the interface circuitry to obtain operating data associated with the endpoint device circuitry; determine an operating state of the endpoint device circuitry based on the operating data; when the operating state is not suitable for an update, trigger a save of a context of the endpoint device circuitry; and, when the operating state is suitable for the update, trigger installation of the update at the endpoint device circuitry.Type: ApplicationFiled: September 24, 2021Publication date: January 13, 2022Inventors: Vrukesh Panse, Rajaram Regupathy, Subrata Banik, Vincent Zimmer
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Publication number: 20210357234Abstract: Particular embodiments described herein provide for an electronic device that includes a battery, a display, an embedded controller to determine a battery condition and set an indicator when then battery condition is at a low power state, and a basic input/output system (BIOS), where, before an operating system stage of a boot process, the BIOS sets a brightness of the display at a native brightness if the indicator is not set and sets the brightness of the display at a low power brightness to reduce the brightness of the display if the indicator is set. In an example, the embedded controller sets the indicator before the central processing unit is reset during the boot process.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Applicant: Intel CorporationInventors: Subrata Banik, Kunjal Parikh, Rajaram Regupathy, Barnali Sarkar
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Patent number: 11169589Abstract: Embodiments are directed toward a universal serial bus (USB) controller including a USB Type-C port that couples to a USB Type-C link including high speed data lines and an alternate mode function line to carry low power commands related to an alternate mode function. In embodiments, the controller or a processor coupled to the controller monitors the line used by the alternate mode function for the low power commands and provides information about the low power commands to a device policy manager (DPM) to determine a power distribution policy for a plurality of devices coupled to the DPM. In embodiments, the power distribution policy supplements or replaces a low power policy of a device of using a USB-C/Power delivery policy and another device using an alternate mode low power policy. Other embodiments may be described and/or claimed.Type: GrantFiled: December 28, 2018Date of Patent: November 9, 2021Assignee: Intel CorporationInventors: Rajaram Regupathy, Abdul R. Ismail
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Patent number: 11157289Abstract: In embodiments, at least one computer-readable medium (CRM) includes a plurality of instructions to cause a computing device, in response to execution of the instructions, to operate a power manager to: receive a request from a first operating system (OS) of a virtualized execution environment (VEE) of the computing device to suspend a first input/output (I/O) device of the computing device. The computing device has a plurality of I/O ports for receiving a plurality of I/O devices including the first I/O device. The plurality of I/O ports are virtualized for a plurality of OSes of the VEE, including the first OS. In response to the receipt, the power manager conditionally suspends the first I/O device if no other guest OS of the VEE is using the first I/O device. Other embodiments are also described and claimed.Type: GrantFiled: May 13, 2019Date of Patent: October 26, 2021Assignee: Intel CorporationInventors: Rajaram Regupathy, Saranya Gopal, Peter Ewert
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Publication number: 20210326142Abstract: Systems, methods, and apparatuses relating to circuitry to implement a multiprocessor boot flow for a faster boot process are described. In one embodiment, a system includes a hardware processor comprising a processor core, a cache coupled to the hardware processor, storage for hardware initialization code, and a controller circuit to initialize a portion of the cache as memory for usage by the hardware initialization code before beginning execution of the hardware initialization code after a power on of the system.Type: ApplicationFiled: June 27, 2020Publication date: October 21, 2021Inventors: SUBRATA BANIK, ASAD AZAM, JENNY M. PELNER, VINCENT ZIMMER, RAJARAM REGUPATHY
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Patent number: 11074211Abstract: An apparatus is provided, where the apparatus includes a plurality of input/output (I/O) ports and a controller. A first port, a second port, and a third port are to be respectively coupled to a first device with a first class type, a second device with a second class type, and a third device with a third class type. The controller is to determine that individual ones of the first and second devices are to perform asynchronous transfer with the apparatus, and that the third device is to perform a transfer that is different from the asynchronous transfer. The controller is to allocate bandwidth to the first and second I/O ports, based at least in part on the first class type and the second class type. The controller is to ignore the third class type, while allocating bandwidth to the third I/O port.Type: GrantFiled: June 12, 2018Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: Abdul R. Ismail, Rajaram Regupathy
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Patent number: 11068041Abstract: A method and system for managing power for Universal Serial Bus (USB) ports, in particular USB Type-C ports that are connected to USB devices that do not support USB power delivery (USB PD). The method and system present an advertisement of a default power supply to a USB device, receive power attribute information from a USB device configuration descriptor during USB device enumeration, in response to the connecting USB device not supporting USB power deliver (USB PD), and dynamically change the power supply to meet the power requirements of the connecting USB device identified by the power attribute information.Type: GrantFiled: June 13, 2017Date of Patent: July 20, 2021Assignee: Intel CorporationInventors: Rajaram Regupathy, Abdul R. Ismail, Paul Sathya Chelladurai
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Patent number: 10963406Abstract: Embodiments may relate to a universal serial bus (USB)-enabled apparatus that includes one or more USB devices that are coupled with a USB host controller by a persistent connection. The USB host controller may identify that the USB device is persistently coupled and then identify USB device information related to the USB device, wherein the USB device information is stored prior to the identification of the USB device. The USB host controller may then use that identified information to perform USB enumeration. Other embodiments may be described or claimed.Type: GrantFiled: June 18, 2019Date of Patent: March 30, 2021Assignee: Intel CorporationInventors: Abdul Rahman Ismail, Rajaram Regupathy, Balaji Manoharan
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Publication number: 20210089326Abstract: Systems, apparatuses and methods may provide for technology that detects a low battery condition in a computing system including an integrated graphics processor and a discrete graphics processor, wherein the low battery condition is detected during a pre-boot stage of the computing system. The technology may also disable a root port associated with the discrete graphics processor in response to the low battery condition, conduct an initialization of an integrated display while the root port is disabled, and enable the root port in response to a successful negotiation of increased power by a verified read write code of an embedded controller of the computing system.Type: ApplicationFiled: December 4, 2020Publication date: March 25, 2021Inventors: Subrata Banik, Rajaram Regupathy, Kalyan Kondapally
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Publication number: 20210089296Abstract: Systems, apparatuses and methods may provide for technology that identifies, during a first boot process, whether at least one task associated with at least one software program is set to occur in a single-threaded process or a multithreaded process, in response to the at least one task being set to occur in the multithreaded process, executing the at least one task in the multithreaded process during the first boot process, and in response to the at least one task being set to occur in the single-threaded process, executing the at least one task in the single-threaded process during the first boot process.Type: ApplicationFiled: December 7, 2020Publication date: March 25, 2021Applicant: Intel CorporationInventors: Subrata Banik, Vincent Zimmer, Rajaram Regupathy, Ravi Poovalur Rangarajan
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Publication number: 20210081538Abstract: Systems, apparatuses and methods may provide for technology that initializes static random access memory (SRAM) of a processor in response to a reset of the processor, allocates the SRAM to one or more security enforcement operations, and triggers a multi-threaded execution of the one or more security enforcement operations before completion of a basic input output system (BIOS) phase. In one example, the multi-threaded execution is triggered independently of a dynamic RAM (DRAM) initialization.Type: ApplicationFiled: December 1, 2020Publication date: March 18, 2021Inventors: Vincent Zimmer, Subrata Banik, Rajaram Regupathy
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Publication number: 20210055777Abstract: In one embodiment, an apparatus includes a host controller to implement one or more layers of a Universal Serial Bus (USB)-based protocol to provide an interconnect for a plurality of devices. The host controller is to monitor control plane messages on the interconnect, detect, in the control plane messages, a power state change command for a device coupled to the interconnect, wherein the devices utilizes a tunneled protocol on the interconnect, and modify power distribution for one or more other devices of the interconnect based on detecting the power state change command.Type: ApplicationFiled: August 18, 2020Publication date: February 25, 2021Applicant: Intel CorporationInventors: Rajaram Regupathy, Abdul R. Ismail, Ziv Kabiry, Abhilash K V, Purushotam Kumar, Gaurav Kumar Singh