Patents by Inventor Rajarshi Bajpayee

Rajarshi Bajpayee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • POINTER DE-REFERENCING TECHNOLOGIES
    Publication number: 20220414818
    Abstract: Examples described herein relate to an apparatus comprising: at least one memory and at least one processor. In some example, the at least one processor is to: represent at least one vertex in a set of vertices of a first polygon using a first index; store the first index into the at least one memory; and indicate whether the first index is to be de-referenced based on a comparison between the first index and at least one other index, wherein: a first memory pointer is associated with the at least one vertex in the set of vertices of the first polygon and the first index comprises a number of bits that is less than a number of bits associated with the first memory pointer. In some examples, the number of bits of the first index is based on a size of a vertex window and wherein the vertex window comprises multiple vertices associated with one or more draw calls.
    Type: Application
    Filed: June 26, 2021
    Publication date: December 29, 2022
    Inventors: Raghavendra KAMATH MIYAR, Rajalakshmi ATHIMOOLAM, Subramaniam MAIYURAN, Jorge F. GARCIA PABON, Rajarshi BAJPAYEE, Krishan MALIK
  • Vertex shader with primitive replication
    Patent number: 10628910
    Abstract: An embodiment of a semiconductor package apparatus may include technology to determine one or more conditions for a set of primitives, and perform primitive replication at a vertex shader based on the determined one or more conditions for the set of primitives. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Tomasz Bujewski, Radoslaw Drabinski, Subramaniam Maiyuran, Jorge Garcia Pabon, Raghavendra Miyar, Rajarshi Bajpayee
  • VERTEX SHADER WITH PRIMITIVE REPLICATION
    Publication number: 20200098078
    Abstract: An embodiment of a semiconductor package apparatus may include technology to determine one or more conditions for a set of primitives, and perform primitive replication at a vertex shader based on the determined one or more conditions for the set of primitives. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Applicant: Intel Corporation
    Inventors: Tomasz Bujewski, Radoslaw Drabinski, Subramaniam Maiyuran, Jorge Garcia Pabon, Raghavendra Miyar, Rajarshi Bajpayee