Abstract: An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.

Abstract: Disclosed is an ultra wide band signal generator. The ultra wide band signal generator generates a signal of a required frequency using a harmonic signal having a frequency range of a ultra wide band (UWB). The ultra wide band signal generator includes an active inductor for generating harmonic signals having power strengths substantially equal to each other within a non-linear operation range, the tunable active inductor capable of tuning a value thereof, an oscillator for amplifying and outputting the harmonic signals generated from the active inductor by frequency-transiting the harmonic signals into high frequency bands, and a filter for selectively outputting one of the harmonic signals output from the oscillator.

Abstract: An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.