Patents by Inventor Rajasekhara Madhusudan Narayana Bhatla

Rajasekhara Madhusudan Narayana Bhatla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiency
    Patent number: 11940824
    Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: March 26, 2024
    Assignee: Intel Corporation
    Inventors: Xiaosen Liu, Harish Krishnamurthy, Krishnan Ravichandran, Vivek De, Scott Chiu, Claudia Patricia Barrera Gonzalez, Jing Han, Rajasekhara Madhusudan Narayana Bhatla
  • TECHNIQUES IN HYBRID REGULATORS OF HIGH POWER SUPPLY REJECTION RATIO AND CONVERSION EFFICIENCY
    Publication number: 20210103308
    Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.
    Type: Application
    Filed: November 20, 2020
    Publication date: April 8, 2021
    Inventors: Xiaosen Liu, Harish Krishnamurthy, Krishnan Ravichandran, Vivek De, Scott Chiu, Claudia Patricia Barrera Gonzalez, Jing Han, Rajasekhara Madhusudan Narayana Bhatla
  • Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiency
    Patent number: 10845831
    Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Xiaosen Liu, Harish Krishnamurthy, Krishnan Ravichandran, Vivek De, Scott Chiu, Claudia Patricia Barrera Gonzalez, Jing Han, Rajasekhara Madhusudan Narayana Bhatla
  • TECHNIQUES IN HYBRID REGULATORS OF HIGH POWER SUPPLY REJECTION RATIO AND CONVERSION EFFICIENCY
    Publication number: 20190317536
    Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.
    Type: Application
    Filed: June 24, 2019
    Publication date: October 17, 2019
    Inventors: Xiaosen Liu, Harish Krishnamurthy, Krishnan Ravichandran, Vivek De, Scott Chiu, Claudia Patricia Barrera Gonzalez, Jing Han, Rajasekhara Madhusudan Narayana Bhatla