Abstract: Technologies are described to automate design of field programmable gate array (FPGA) circuits, specifically for fast and efficient architectures for large integer adders and counters through direct instantiation of carry chain primitives and lookup tables in circuit description. In some examples, placement of circuits on relatively adjacent slices may be controlled such that the slices are strongly and logically coupled to enable compact placement and thereby contributing to reduced routing delay and FPGA chip area. Design descriptions and constraint files may be automatically generated by a design application providing operand-width scalability with respect to operating frequency of the designed circuit.

Abstract: Technologies are presented for data deduplication that operates at relatively high throughput and with relatively less storage space than conventional techniques. Building upon content-dependent chunking (CDC) using Rabin fingerprints, data may be fingerprinted and stored in variable-size chunks. In some examples, data may be chunked on multiple levels, for example, two levels, variable size large chunks in the first level and fixed-size sub-chunks in the second level, in order to prevent sub-chunks common to two or more data chunks from not being deduplicated. For example, at a first level, a CDC algorithm may be employed to fingerprint and chunk data in content-dependent sizes (variable sizes), and at a second level the CDC chunks may be sliced into small fixed-size chunks. The sliced CDC chunks may then be used for deduplication.

Abstract: Technologies are presented for data deduplication that operates at relatively high throughput and with relatively less storage space than conventional techniques. Building upon content-dependent chunking (CDC) using Rabin fingerprints, data may be fingerprinted and stored in variable-size chunks. In some examples, data may be chunked on multiple levels, for example, two levels, variable size large chunks in the first level and fixed-size sub-chunks in the second level, in order to prevent sub-chunks common to two or more data chunks from not being deduplicated. For example, at a first level, a CDC algorithm may be employed to fingerprint and chunk data in content-dependent sizes (variable sizes), and at a second level the CDC chunks may be sliced into small fixed-size chunks. The sliced CDC chunks may then be used for deduplication.

Abstract: One embodiment provides a method for protecting an integrated circuit chip design. The method can include storing in memory a circuit description of an integrated circuit core comprising a set of nodes and selecting a plurality of modification nodes from the set of nodes. A sequential structure can be inserted into the circuit description to provide a modified circuit description, the sequential structure utilizing the plurality of modification nodes as inputs. The modified circuit description can be stored in memory.

Abstract: One embodiment provides a method for protecting an integrated circuit chip design. The method can include storing in memory a circuit description of an integrated circuit core comprising a set of nodes and selecting a plurality of modification nodes from the set of nodes. A sequential structure can be inserted into the circuit description to provide a modified circuit description, the sequential structure utilizing the plurality of modification nodes as inputs. The modified circuit description can be stored in memory.