Patents by Inventor Rajeev Gopalakrishna

Rajeev Gopalakrishna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Instruction for performing an overload check
    Patent number: 10162640
    Abstract: A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: December 25, 2018
    Assignee: Intel Corporation
    Inventors: Martin G. Dixon, Baiju V. Patel, Rajeev Gopalakrishna
  • Method, apparatus, system, and computer readable medium for providing apparatus security
    Patent number: 10091216
    Abstract: Technologies are provided in embodiments for receiving policy information associated with at least one security exception, the security exception relating to execution of at least one program, determining an operation associated with the security exception based, at least in part, on the policy information, and causing the operation to be performed, based at least in part, on a determination that the at least one security exception occurred.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 2, 2018
    Assignee: Intel Corporation
    Inventors: Gal Chanoch, Eran Birk, Baiju Patel, Steven Grobman, Tobias Kohlenberg, Rajeev Gopalakrishna
  • INSTRUCTION FOR PERFORMING AN OVERLOAD CHECK
    Publication number: 20170109160
    Abstract: A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.
    Type: Application
    Filed: August 16, 2016
    Publication date: April 20, 2017
    Inventors: MARTIN G. DIXON, BAIJU V. PATEL, RAJEEV GOPALAKRISHNA
  • METHOD, APPARATUS, SYSTEM, AND COMPUTER READABLE MEDIUM FOR PROVIDING APPARATUS SECURITY
    Publication number: 20160323297
    Abstract: Technologies are provided in embodiments for receiving policy information associated with at least one security exception, the security exception relating to execution of at least one program, determining an operation associated with the security exception based, at least in part, on the policy information, and causing the operation to be performed, based at least in part, on a determination that the at least one security exception occurred.
    Type: Application
    Filed: March 28, 2016
    Publication date: November 3, 2016
    Inventors: Gal Chanoch, Eran Birk, Baiju Patel, Steven Grobman, Tobias Kohlenberg, Rajeev Gopalakrishna
  • Instruction for performing an overload check
    Patent number: 9417880
    Abstract: A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Martin Dixon, Baiju Patel, Rajeev Gopalakrishna
  • Instruction For Performing An Overload Check
    Publication number: 20140281406
    Abstract: A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Martin DIXON, Baiju PATEL, Rajeev GOPALAKRISHNA
  • Managing and implementing metadata in central processing unit using register extensions
    Patent number: 8635415
    Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: January 21, 2014
    Assignee: Intel Corporation
    Inventors: Baiju V. Patel, Rajeev Gopalakrishna, Andrew F. Glew, Robert J. Kushlis, Don Alan Van Dyke, Joseph Frank Cihula, Asit K. Mallick, James B. Crossland, Gilbert Neiger, Scott Dion Rodgers, Martin Guy Dixon, Mark Jay Charney, Jacob (Koby) Gottlieb
  • MANAGING AND IMPLEMENTING METADATA IN CENTRAL PROCESSING UNIT USING REGISTER EXTENSIONS
    Publication number: 20110078389
    Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Inventors: Baiju V. Patel, Rajeev Gopalakrishna, Andrew F. Glew, Robert J. Kushlis, Don Alan Van Dyke, Joseph Frank Cihula, Asit K. Mallick, James B. Crossland, Gilbert Neiger, Scott Dion Rodgers, Martin Guy Dixon, Mark Jay Charney, Jocob Gottlieb