Abstract: Control of volume in bioreactors and associated systems is generally described. Feeding and/or sampling strategies can be employed, in some embodiments, such that the working volume within the bioreactor remains substantially constant.

Abstract: Control of humidity in chemical reactors, and associated systems and methods, are generally described. In certain embodiments, the humidity within gas transport conduits and chambers can be controlled to inhibit unwanted condensation within gas transport pathways. By inhibiting condensation within gas transport pathways, clogging of such pathways can be limited (or eliminated) such that transport of gas can be more easily and controllably achieved. In addition, strategies for purging condensed liquid from chemical reactor systems are also described.

Abstract: Control of humidity in chemical reactors, and associated systems and methods, are generally described. In certain embodiments, the humidity within gas transport conduits and chambers can be controlled to inhibit unwanted condensation within gas transport pathways. By inhibiting condensation within gas transport pathways, clogging of such pathways can be limited (or eliminated) such that transport of gas can be more easily and controllably achieved. In addition, strategies for purging condensed liquid from chemical reactor systems are also described.

Abstract: Control of humidity in chemical reactors, and associated systems and methods, are generally described. In certain embodiments, the humidity within gas transport conduits and chambers can be controlled to inhibit unwanted condensation within gas transport pathways. By inhibiting condensation within gas transport pathways, clogging of such pathways can be limited (or eliminated) such that transport of gas can be more easily and controllably achieved. In addition, strategies for purging condensed liquid from chemical reactor systems are also described.

Abstract: A waveguide-coupled Silicon Germanium (SiGe) photodetector. A p-n silicon junction is formed in a silicon substrate by an n-doped silicon region and a p-doped silicon region, a polysilicon rib is formed on the silicon substrate to provide a waveguide core for an optical mode of radiation, and an SiGe pocket is formed in the silicon substrate along a length of the polysilicon rib and contiguous with the p-n silicon junction. An optical mode of radiation, when present, substantially overlaps with the SiGe pocket so as to generate photocarriers in the SiGe pocket. An electric field arising from the p-n silicon junction significantly facilitates a flow of the generated photocarriers through the SiGe pocket. In one example, such photodetectors have been fabricated using a standard CMOS semiconductor process technology without requiring changes to the process flow (i.e., “zero-change CMOS”).

Abstract: Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure.

Abstract: Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer.

Abstract: Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer.

Abstract: Control of volume in bioreactors and associated systems is generally described. Feeding and/or sampling strategies can be employed, in some embodiments, such that the working volume within the bioreactor remains substantially contstant.

Abstract: Control of humidity in chemical reactors, and associated systems and methods, are generally described. In certain embodiments, the humidity within gas transport conduits and chambers can be controlled to inhibit unwanted condensation within gas transport pathways. By inhibiting condensation within gas transport pathways, clogging of such pathways can be limited (or eliminated) such that transport of gas can be more easily and controllably achieved. In addition, strategies for purging condensed liquid from chemical reactor systems are also described.

Abstract: Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer.

Abstract: Control of volume in bioreactors and associated systems is generally described. Feeding and/or sampling strategies can be employed, in some embodiments, such that the working volume within the bioreactor remains substantially constant.

Abstract: Control of humidity in chemical reactors, and associated systems and methods, are generally described. In certain embodiments, the humidity within gas transport conduits and chambers can be controlled to inhibit unwanted condensation within gas transport pathways. By inhibiting condensation within gas transport pathways, clogging of such pathways can be limited (or eliminated) such that transport of gas can be more easily and controllably achieved. In addition, strategies for purging condensed liquid from chemical reactor systems are also described.

Abstract: Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure.

Abstract: A non-paraxial Talbot spectrometer includes a transmission grating to receive incident light. The grating period of the transmission grating is comparable to the wavelength of interest so as to allow the Talbot spectrometer to operate outside the paraxial limit. Light transmitted through the transmission grating forms periodic Talbot images. A tilted detector is employed to simultaneously sample the Talbot images at various distances along a direction perpendicular to the grating. Spectral information of the incident light can be calculated by taking Fourier transform of the measured Talbot images or by comparing the measured Talbot images with a library of intensity patterns acquired with light sources having known wavelengths.

Abstract: Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage (e.g., V<kBT/q) can be accomplished by injecting phonons generated by non-radiative recombination back into the LED's semiconductor lattice. This raises the temperature of the LED's active rejection, resulting in thermally assisted injection of holes and carriers into the LED's active region. This phonon recycling or thermo-electric pumping process can be promoted by heating the LED with an external source (e.g., exhaust gases or waste heat from other electrical components). It can also be achieved via internal heat generation, e.g., by thermally insulating the LED's diode structure to prevent (rather than promote) heat dissipation. In other words, trapping heat generated by the LED within the LED increases LED efficiency under certain bias conditions.

Abstract: Guided-wave photodetectors based on absorption of infrared photons by mid-bandgap states in non-crystal semiconductors. In one example, a resonant guided-wave photodetector is fabricated based on a polysilicon layer used for the transistor gate in a SOI CMOS process without any change to the foundry process flow (‘zero-change’ CMOS). Mid-bandgap defect states in the polysilicon absorb infrared photons. Through a combination of doping mask layers, a lateral p-n junction is formed in the polysilicon, and a bias voltage applied across the junction creates a sufficiently strong electric field to enable efficient photo-generated carrier extraction and high-speed operation. An example device has a responsivity of more than 0.14 A/W from 1300 to 1600 nm, a 10 GHz bandwidth, and 80 nA dark current at 15 V reverse bias.

Abstract: Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer.

Abstract: Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer.

Abstract: Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage (e.g., V<kBT/q) can be accomplished by injecting phonons generated by non-radiative recombination back into the LED's semiconductor lattice. This raises the temperature of the LED's active rejection, resulting in thermally assisted injection of holes and carriers into the LED's active region. This phonon recycling or thermo-electric pumping process can be promoted by heating the LED with an external source (e.g., exhaust gases or waste heat from other electrical components). It can also be achieved via internal heat generation, e.g., by thermally insulating the LED's diode structure to prevent (rather than promote) heat dissipation. In other words, trapping heat generated by the LED within the LED increases LED efficiency under certain bias conditions.