Patents by Inventor Rajeev Kumar Barua

Rajeev Kumar Barua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8645935
    Abstract: Binary rewriters that do not require relocation information and automatic parallelizers within binary rewriters are provided, as well as methods for performing binary rewriting and automatic parallelization. The method, in certain embodiments. includes disassembling a binary file and determining functions in the disassembled binary file. The method can further include rewriting the binary file without relying on relocation information or object files. Optionally, the method can further include performing automatic parallelization of the binary before rewriting the binary file.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: February 4, 2014
    Assignee: University of Maryland
    Inventors: Rajeev Kumar Barua, Aparna Kotha
  • Patent number: 8510723
    Abstract: A binary rewriter that can provide complete code coverage without relocation information is provided, together with a method of performing such rewriting. The method can include processing a binary file as an original binary file. The method can also include disassembling the binary file to provide a disassembled binary file. The method can further include rewriting the disassembled binary file without relocation information to provide a rewritten binary file. The rewriting can provide a physical transformation in a recording medium relative to the binary file in the recording medium prior to the rewriting. The processing the binary file, disassembling the binary file, and rewriting the disassembled binary file can be performed by a particular machine.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 13, 2013
    Assignee: University of Maryland
    Inventors: Rajeev Kumar Barua, Matthew Smithson
  • Publication number: 20100306746
    Abstract: A binary rewriter that can provide complete code coverage without relocation information is provided, together with a method of performing such rewriting. The method can include processing a binary file as an original binary file. The method can also include disassembling the binary file to provide a disassembled binary file. The method can further include rewriting the disassembled binary file without relocation information to provide a rewritten binary file. The rewriting can provide a physical transformation in a recording medium relative to the binary file in the recording medium prior to the rewriting. The processing the binary file, disassembling the binary file, and rewriting the disassembled binary file can be performed by a particular machine.
    Type: Application
    Filed: May 24, 2010
    Publication date: December 2, 2010
    Applicant: UNIVERSITY OF MARYLAND
    Inventors: Rajeev Kumar Barua, Matthew Smithson
  • Publication number: 20100299657
    Abstract: Binary rewriters that do not require relocation information and automatic parallelizers within binary rewriters are provided, as well as methods for performing binary rewriting and automatic parallelization. The method, in certain embodiments. includes disassembling a binary file and determining functions in the disassembled binary file. The method can further include rewriting the binary file without relying on relocation information or object files. Optionally, the method can further include performing automatic parallelization of the binary before rewriting the binary file.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 25, 2010
    Applicant: UNIVERSITY OF MARYLAND
    Inventors: Rajeev Kumar BARUA, Aparna KOTHA
  • Patent number: 7367024
    Abstract: A highly predictable, low overhead and yet dynamic, memory allocation methodology for embedded systems with scratch-pad memory is presented. The dynamic memory allocation methodology for global and stack data (i) accounts for changing program requirements at runtime; (ii) has no software-caching tags; (iii) requires no run-time checks; (iv) has extremely low overheads; and (v) yields 100% predictable memory access times. The methodology provides that for data that is about to be accessed frequently is copied into the SRAM using compiler-inserted code at fixed and infrequent points in the program. Earlier data is evicted if necessary.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: April 29, 2008
    Assignee: University of Maryland
    Inventors: Rajeev Kumar Barua, Sumesh Udayakumaran