Patents by Inventor Rajeev Sethia

Rajeev Sethia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7181767
    Abstract: The present invention increases the difficulty of interpreting electromagnetic emissions from a keypad system by facilitating randomness in the electromagnetic emissions associated with a particular key activation. A keypad security circuit utilizes a set of digital values that varies over both time and the bits as a keypad driver word applied to a keypad attribute (e.g., a row or column). The keypad security system of the present invention drives the varying strong keypad driver signal to an attribute of a keypad switch matrix (e.g., the rows or columns), applies an independently configured weak driver signals to the opposing attribute of the keypad switch matrix, retrieves a resulting signal from the opposing attribute, and interprets the results to determine if a switch included in a keypad system was activated (e.g., a key is pressed).
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: February 20, 2007
    Assignee: NXP B.V.
    Inventors: Rajeev Sethia, Franklyn H. Story, Mark Buer
  • Patent number: 6694441
    Abstract: A power management system permits power-reduced operation of selected circuit blocks in a manner that requires no modification to other bus-coupled circuit blocks attempting to communicate with such selected circuit blocks. Consistent with one embodiment of the present invention, the approach is implemented in a digital electronic circuit arrangement having an accessing circuit block coupled to a clocked circuit block over a data bus. The clocked circuit block is power managed by decreasing, e.g., reducing or blocking, the clock speed to the clocked circuit block which impedes its ability communicate over the data bus. Once the clocked circuit block is set in a reduced power mode, the bus is monitored for data-access communications from the accessing circuit block to the clocked circuit block.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: February 17, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Rajeev Sethia
  • Publication number: 20030115503
    Abstract: A system for enhancing fault tolerances and security of a computing system having a system clock through monitoring the computing system for at least one of a series of security attacks and upon detection of security attacks, switching the system from the system clock to a secure clock.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Judson A. Lehman, Rajeev Sethia