Patents by Inventor Rajeevan PANCHACHARAMOORTHY

Rajeevan PANCHACHARAMOORTHY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948534
    Abstract: A display system modifies display cycles of one or more displays to perform a system operation while avoiding visual perturbations at the one or more displays. The display system modifies, synchronizes, or both, blanking periods of the one or more displays such that blanking periods equal or exceed a blackout duration and overlap for at least the blackout duration. Then the system performs the system operation during an overlapping portion of the one or more blanking periods, where the system operation reduces availability of display data at the one or more displays.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 2, 2024
    Assignee: ATI Technologies ULC
    Inventors: Jun Lei, Syed Athar Hussain, David I. J. Glen, Rajeevan Panchacharamoorthy, Fatemeh Amirnavaei, David Galiffi, Arshad Rahman, Boris Ivanovic
  • Patent number: 11699408
    Abstract: Systems, apparatuses, and methods for performing asynchronous memory clock changes on multiple displays are disclosed. From time to time, a memory clock frequency change is desired for a memory subsystem storing frame buffer(s) used to drive pixels to multiple displays. For example, when the real-time memory bandwidth demand differs from the memory bandwidth available with the existing memory clock frequency, a control unit tracks the vertical blanking interval (VBI) timing of a first display. Also, the control unit causes a second display to enter into panel self-refresh (PSR) mode. Once the PSR mode of the second display overlaps with a VBI of the first display, a memory clock frequency change, including memory training, is initiated. After the memory clock frequency change, the displays are driven by the frame buffer(s) in the memory subsystem at an updated frequency.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: July 11, 2023
    Assignee: ATI Technologies ULC
    Inventors: Arshad Rahman, Rajeevan Panchacharamoorthy, Boris Ivanovic
  • Publication number: 20230118079
    Abstract: A display system modifies display cycles of one or more displays to perform a system operation while avoiding visual perturbations at the one or more displays. The display system modifies, synchronizes, or both, blanking periods of the one or more displays such that blanking periods equal or exceed a blackout duration and overlap for at least the blackout duration. Then the system performs the system operation during an overlapping portion of the one or more blanking periods, where the system operation reduces availability of display data at the one or more displays.
    Type: Application
    Filed: July 29, 2022
    Publication date: April 20, 2023
    Inventors: Jun LEI, Syed Athar HUSSAIN, David I.J. GLEN, Rajeevan PANCHACHARAMOORTHY, Fatemeh AMIRNAVAEI, David GALIFFI, Arshad RAHMAN, Boris IVANOVIC
  • Patent number: 11430410
    Abstract: A display system modifies display cycles of one or more displays to perform a system operation while avoiding visual perturbations at the one or more displays. The display system modifies, synchronizes, or both, blanking periods of the one or more displays such that blanking periods equal or exceed a blackout duration and overlap for at least the blackout duration. Then the system performs the system operation during an overlapping portion of the one or more blanking periods, where the system operation reduces availability of display data at the one or more displays.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: August 30, 2022
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Jun Lei, Syed Athar Hussain, David I. J. Glen, Rajeevan Panchacharamoorthy, Fatemeh Amirnavaei, David Galiffi, Arshad Rahman, Boris Ivanovic
  • Publication number: 20220199047
    Abstract: Systems, apparatuses, and methods for performing asynchronous memory clock changes on multiple displays are disclosed. From time to time, a memory clock frequency change is desired for a memory subsystem storing frame buffer(s) used to drive pixels to multiple displays. For example, when the real-time memory bandwidth demand differs from the memory bandwidth available with the existing memory clock frequency, a control unit tracks the vertical blanking interval (VBI) timing of a first display. Also, the control unit causes a second display to enter into panel self-refresh (PSR) mode. Once the PSR mode of the second display overlaps with a VBI of the first display, a memory clock frequency change, including memory training, is initiated. After the memory clock frequency change, the displays are driven by the frame buffer(s) in the memory subsystem at an updated frequency.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Inventors: Arshad Rahman, Rajeevan Panchacharamoorthy, Boris Ivanovic
  • Publication number: 20210375234
    Abstract: A display system modifies display cycles of one or more displays to perform a system operation while avoiding visual perturbations at the one or more displays. The display system modifies, synchronizes, or both, blanking periods of the one or more displays such that blanking periods equal or exceed a blackout duration and overlap for at least the blackout duration. Then the system performs the system operation during an overlapping portion of the one or more blanking periods, where the system operation reduces availability of display data at the one or more displays.
    Type: Application
    Filed: June 1, 2020
    Publication date: December 2, 2021
    Inventors: Jun LEI, Syed Athar HUSSAIN, David I.J. GLEN, Rajeevan PANCHACHARAMOORTHY, Fatemeh AMIRNAVAEI, David GALIFFI, Arshad RAHMAN, Boris IVANOVIC