Patents by Inventor Rajendra Bera

Rajendra Bera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080040664
    Abstract: Grouping blocks of text according to user-defined contexts, and editing group specific blocks can be used to improve document consistency during editing and revising of electronic documents. A change made in one block often requires appropriate changes to be made in other blocks that are contextually related to the changed block. Such changes are made to ensure this consistency. Commands that deal with block groups (such as, create group, add block to group(s), delete block from group(s), edit group, merge group, etc.) are provided to assist a user in editing documents.
    Type: Application
    Filed: October 22, 2007
    Publication date: February 14, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Rajendra Bera
  • Publication number: 20070169023
    Abstract: A method of restructuring a source computer program to a target computer program. A defined source computer program has source code. A set of tasks is defined for the source computer program to be performed by the source computer program. For each task, a corresponding set of input data sets is defined. For each input data set, a corresponding set of programs is determined such that each program in the set of programs includes declarations and executable statements, from the source code of the source computer program, required to execute the task in each input data set. Each set of programs is processed to generate a component that executes the respective task, resulting in generation of a set of components. A target computer program is generated from the set of components.
    Type: Application
    Filed: March 1, 2007
    Publication date: July 19, 2007
    Inventor: Rajendra Bera
  • Publication number: 20070169061
    Abstract: Parallelization of loops is performed for loops having indirect loop index variables and embedded conditional statements in the loop body. Loops having any finite number of array variables in the loop body, and any finite number of indirect loop index variables can be parallelized. There are two particular limitations of the described techniques: (i) that there are no cross-iteration dependencies in the loop other than through the indirect loop index variables; and (ii) that the loop index variables (either direct or indirect) are not redefined in the loop body.
    Type: Application
    Filed: January 5, 2007
    Publication date: July 19, 2007
    Inventors: Rajendra Bera, Rajendra Bera
  • Publication number: 20070083869
    Abstract: A method of processing allocation and deallocation requests in a computing environment. The method forms an Allocation Queue of requests for resource allocations, a Deallocation Queue of requests for resource deallocations, a Pending Queue of requests for resource allocation which cannot be met immediately, and a Cancel Queue of requests to cancel an earlier request already waiting in either the Pending Queue or the Allocation Queue. A cycle of servicing the Allocation Queue, the Deallocation Queue, the Pending Queue, and the Cancel Queue in a chronological sequence is carryed out. In the cycle: the Deallocation Queue is serviced first, the Cancel Queue is serviced after the Deallocation Queue is serviced until the Cancel Queue is empty, the Pending Queue is serviced after the Cancel Queue is serviced, and the Allocation Queue Queue is serviced after the Pending Queue is serviced.
    Type: Application
    Filed: October 10, 2006
    Publication date: April 12, 2007
    Inventor: Rajendra Bera
  • Publication number: 20060080071
    Abstract: A first representation of an electrical network includes a first set of simultaneous linear algebraic equations (SLAE's). A second representation of an electrical network includes a second set of SLAE's. The equations of the SLAE's include a number of unknowns and have coefficients for the respective unknowns. A number of the coefficients are expressed in algebraic form. The coefficients of one such equation from one of the sets of SLAE's are for respective elements of the set's respective electrical network and the unknowns are for respective operating properties of the set's respective electrical network. Results are derived in pairs for each unknown of each respective one of the SLAE's. The pairs of results are compared in a specified manner to determine a network equivalence. The results are derived from the SLAE's and expressed in algebraic form, so that the comparing of the pairs of results includes comparing algebraic expressions.
    Type: Application
    Filed: November 23, 2005
    Publication date: April 13, 2006
    Inventor: Rajendra Bera
  • Publication number: 20060015550
    Abstract: A computer implemented method (200) is described for determining the equivalence of two sets of simultaneous linear algebraic equations. Each of said equations is of a form: ei1x1+ei2x2+ei3x3+ . . . +eiixn=bi wherein xj are unknowns, eij are coefficients and bi are quantities, and defining the relationship between the unknowns within the set. The coefficients and quantities are known algebraic expressions. The unknowns are iteratively eliminated (250 to 280) from each of the sets of simultaneous linear algebraic equations until each of said equations are in the form: (lii)kxi=(ri)k wherein lii and ri are algebraic expressions, and k={1;2} indicate one of said sets that said equation is derived from. The products (lii)1*(ri)2 and (lii)2*(ri)1 are compared (300) for each of the unknowns. Only if the products match (310) for all the unknowns are the two sets of simultaneous linear algebraic equations equivalent (312). An apparatus (100) for performing the above method (200) is also provided.
    Type: Application
    Filed: September 20, 2005
    Publication date: January 19, 2006
    Inventor: Rajendra Bera
  • Publication number: 20050131977
    Abstract: Parallelization of loops is performed for loops having indirect loop index variables and embedded conditional statements in the loop body. Loops having any finite number of array variables in the loop body, and any finite number of indirect loop index variables can be parallelized. There are two particular limitations of the described techniques: (i) that there are no cross-iteration dependencies in the loop other than through the indirect loop index variables; and (ii) that the loop index variables (either direct or indirect) are not redefined in the loop body.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Applicant: International Business Machines Corporation
    Inventor: Rajendra Bera