Patents by Inventor Rajendrakumar Chinnaiyan

Rajendrakumar Chinnaiyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12112194
    Abstract: Systems, apparatuses and methods may provide for technology that detects an over current condition associated with a voltage regulator in a computing system, identifies a configurable over current protection policy associated with the voltage regulator, and automatically takes a protective action based on the configurable over current protection policy. In one example, the protective action includes one or more of a frequency throttle of a processor coupled to the voltage regulator in isolation from one or more additional processors in the computing system, a deactivation of the processor in isolation from the one or more additional processors, an issuance of a virtual machine monitor notification, an issuance of a data center fleet manager notification, or an initiation of a migration of a workload from the processor to at least one of the additional processor(s).
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: October 8, 2024
    Assignee: Intel Corporation
    Inventors: Rajesh Poornachandran, Rajendrakumar Chinnaiyan, Vincent Zimmer, Ravikiran Chukka
  • Publication number: 20240143505
    Abstract: Methods and apparatus for dynamic selection of super queue size for CPUs with higher number of cores. An apparatus includes a plurality of compute modules, each module including a plurality of processor cores with integrated first level (L1) caches and a shared second level (L2) cache, a plurality of Last Level Caches (LLCs) or LLC blocks and a plurality of memory interface blocks interconnect via a mesh interconnect. A compute module is configured to arbitrate access to the shared L2 cache and enqueue L2 cache misses in a super queue (XQ). The compute module further is configured to dynamically adjust the size of the XQ during runtime operations. The compute module tracks parameters comprising an L2 miss rate or count and LLC hit latency and adjusts the XQ size as a function of these parameters. A lookup table using the L2 miss rate/count and LLC hit latency may be implemented to dynamically select the XQ size.
    Type: Application
    Filed: December 22, 2023
    Publication date: May 2, 2024
    Inventors: Amruta MISRA, Ajay RAMJI, Rajendrakumar CHINNAIYAN, Chris MACNAMARA, Karan PUTTANNAIAH, Pushpendra KUMAR, Vrinda KHIRWADKAR, Sanjeevkumar Shankrappa ROKHADE, John J. BROWNE, Francesc GUIM BERNAT, Karthik KUMAR, Farheena Tazeen SYEDA
  • Publication number: 20210141665
    Abstract: Systems, apparatuses and methods may provide for technology that detects an over current condition associated with a voltage regulator in a computing system, identifies a configurable over current protection policy associated with the voltage regulator, and automatically takes a protective action based on the configurable over current protection policy. In one example, the protective action includes one or more of a frequency throttle of a processor coupled to the voltage regulator in isolation from one or more additional processors in the computing system, a deactivation of the processor in isolation from the one or more additional processors, an issuance of a virtual machine monitor notification, an issuance of a data center fleet manager notification, or an initiation of a migration of a workload from the processor to at least one of the additional processor(s).
    Type: Application
    Filed: December 15, 2020
    Publication date: May 13, 2021
    Inventors: Rajesh Poornachandran, Rajendrakumar Chinnaiyan, Vincent Zimmer, Ravikiran Chukka